XQ18V04 Datasheet, PDF (7/17 Pages) Xilinx, Inc – QPro XQ18V04 (XQR18V04) QML In-System Programmable Configuration PROMs

R
QPro XQ18V04 (XQR18V04) QML In-System Programmable Configuration PROMs
TCK
TMS
TDI
TDO
T_CKMIN
T_MSS
T_DIS
T_MSH
T_DIH
T_DOV
Figure 4: Test Access Port Timing
TAP AC Parameters
Table 5 shows the timing parameters for the TAP waveforms
shown in Figure 4
Table 5: Test Access Port Timing Parameters
Symbol
Parameter
Min
Max
T_CKMIN1
TCK minimum clock period
100
-
T_CKMIN2
TCK minimum clock period, Bypass mode
50
-
T_MSS
TMS setup time
10
-
T_MSH
TMS hold time
25
-
T_DIS
TDI setup time
10
-
T_DIH
TDI hold time
25
-
T_DOV
TDO valid delay
-
25
DS026_04_020300
Units
ns
ns
ns
ns
ns
ns
ns
DS082 (v1.2) November 5, 2001
www.xilinx.com
7
Preliminary Product Specification
1-800-255-7778