XQ18V04 Datasheet, PDF (10/17 Pages) Xilinx, Inc – QPro XQ18V04 (XQR18V04) QML In-System Programmable Configuration PROMs

QPro XQ18V04 (XQR18V04) QML In-System Programmable Configuration PROMs
R
DOUT
FPGA
Modes*
VCC
4.7K
VCC
**
OPTIONAL
Daisy-chained
FPGAs with
different
configurations
OPTIONAL
Slave FPGAs
with identical
configurations
Vcc Vcco
DIN
CCLK
DONE
INIT
VCC VCCO
DATA
First
CLK _PROM
CE
CEO
OE/RESET
PROGRAM
CF
(Low Resets the Address Pointer)
*For Mode pin connections, refer to the appropriate FPGA data sheet.
**Virtex, Virtex-E is 300 ohms, all others are 4.7K.
Master Serial Mode
I/O*
I/O*
VCC VCCO
CS
Modes***
WRITE
VIRTEX
1K ^1K
Select MAP
VCC
NC BUSY
**
External Osc
3.3V
4.7K
VCC VCCO
XC18Vxx
CCLK
CLK
PROGRAM D[0:7]
8
D[0:7]
CEO
DONE
INIT
CE
CF
OE/RESET
DATA
CLK
CE
Cascaded
PROM
OE/RESET
CF
*CS and WRITE must be pulled down to be used as I/O. One option is shown.
**Virtex, Virtex-E is 300 ohms, all others are 4.7K.
***For Mode pin connections, refer to the appropriate FPGA data sheet.
Virtex Select MAP Mode
VCC
VCC VCCO
4.7K
VCC VCCO
CEO
8
D[0:7]
CE ^{XC18Vxx CF}
OE/RESET
CLK
VCC
4.7K
VCC
M0 M1
CS1
DOUT
Spartan-XL,
XC4000
D[0:7]
PROGRAM DONE
INIT
CCLK
External Osc
Spartan-XL Express Mode
M0 M1
CS1
DOUT
Optional
Daisy-chained
Spartan-XL,
XC4000
D[0:7]
PROGRAM DONE
INIT
CCLK
To Additional
Optional
Daisy-chained
Devices
To Additional
Optional
Daisy-chained
Devices
DS026_05_031000
Figure 6: (a) Master Serial Mode (b) Virtex Select MAP Mode (c) Spartan-XL Express Mode
(dotted lines indicates optional connection)
10
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DS082 (v1.2) November 5, 2001
1-800-255-7778
Preliminary Product Specification