XC18V00 Datasheet, PDF (6/21 Pages) Xilinx, Inc – XC18V00 Series In-System

XC18V00 Series In-System Programmable Configuration PROMs
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Table 2: Xilinx FPGAs and Compatible PROMs
Device
Configuration
Bits
XC18V00
Solution
XC3S1500
5,214,784
XC18V04 +
XC18V01
XC3S2000
7,673,024
2 of XC18V04
XC3S4000
11,316,864
3 of XC18V04
XC3S5000
13,271,936
3 of XC18V04 +
XC18V01
Capacity
Devices
XC18V04
XC18V02
XC18V01
XC18V512
Configuration Bits
4,194,304
2,097,152
1,048,576
524,288
In-System Programming
In-System Programmable PROMs can be programmed
individually, or two or more can be daisy-chained together
and programmed in-system via the standard 4-pin JTAG
protocol as shown in Figure 2. In-system programming
offers quick and efficient design iterations and eliminates
unnecessary package handling or socketing of devices.
The Xilinx development system provides the programming
data sequence using either Xilinx iMPACT software and a
download cable, a third-party JTAG development system, a
JTAG-compatible board tester, or a simple microprocessor
interface that emulates the JTAG instruction sequence. The
iMPACT software also outputs serial vector format (SVF)
files for use with any tools that accept SVF format and with
automatic test equipment.
All outputs are held in a high-impedance state or held at
clamp levels during in-system programming.
OE/RESET
The ISP programming algorithm requires issuance of a
reset that causes OE to go Low.
External Programming
Xilinx reprogrammable PROMs can also be programmed by
the Xilinx HW-130, Xilinx MultiPRO, or a third-party device
programmer. This provides the added flexibility of using
pre-programmed devices with an in-system programmable
option for future enhancements and design changes.
V CCINT
GND
(a)
(b)
DS026_02_06/1103
Figure 2: In-System Programming Operation (a) Solder Device to PCB and (b) Program Using Download Cable
Reliability and Endurance
Xilinx in-system programmable products provide a guaran-
teed endurance level of 20,000 in-system program/erase
cycles and a minimum data retention of 20 years. Each
device meets all functional, performance, and data reten-
tion specifications within this endurance limit.
Design Security
The Xilinx in-system programmable PROM devices incor-
porate advanced data security features to fully protect the
programming data against unauthorized reading via JTAG.
Table 3 shows the security setting available.
6
www.xilinx.com
DS026 (v4.0) June 11, 2003
1-800-255-7778
Product Specification