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XQ18V04_03 Datasheet, PDF (5/15 Pages) Xilinx, Inc – IEEE Std 1149.1 boundary-scan (JTAG) support
R
QPro XQ18V04 Military 4Mbit ISP Configuration Flash PROM
5V Tolerant I/Os
The I/Os on each re-programmable PROM are fully 5V tol-
erant even through the core power supply is 3.3V. This
allows 5V CMOS signals to connect directly to the PROM
inputs without damage. In addition, the 3.3V VCC power
supply can be applied before or after 5V signals are applied
to the I/Os. In mixed 5V/3.3V/2.5V systems, the user pins,
the core power supply (VCC), and the output power supply
(VCCO) may have power applied in any order. This makes
the PROM devices immune to power supply sequencing
issues.
state regardless of the state of the OE input. JTAG pins
TMS, TDI, and TDO can be in a high-impedance state or
High. See Table 3.
Customer Control Bits
The XQ18V04 PROMs have various control bits accessible
by the customer. These can be set after the array has been
programmed using “Skip User Array” in Xilinx iMPACT soft-
ware. The iMPACT software can set these bits to enable the
optional JTAG read security, parallel configuration mode, or
CF-->D4 pin function.
Reset Activation
On power up, OE/RESET is held Low until the XQ18V04 is
active (1 ms) and is able to supply data after receiving a
CCLK pulse from the FPGA. OE/RESET is connected to an
external resistor to pull OE/RESET High releasing the
FPGA INIT and allowing configuration to begin. OE/RESET
is held Low until the XQ18V04 voltage reaches the operat-
ing voltage range. If the power drops below 2.0V, the
PROM will reset. OE/RESET polarity is NOT programma-
ble. See Figure 4 for power-on requirements.
Standby Mode
The PROM enters a low-power standby mode whenever CE
is asserted High. The output remains in a high-impedance
3.6V
3.0V
Recommended Operating Range
Recommended
VCCINT Rise
Time
0V
0ms 1ms
Time (ms)
50ms
ds026_10_102303
Figure 4: VCCINT Power-On Requirements
Table 3: Truth Table for PROM Control Inputs
Control Inputs
OE/RESET
CE
High
Low
Internal Address
If address < TC(1): increment
If address > TC(1): don’t change
Low
Low
Held reset
High
High
Held reset
Low
High
Held reset
Notes:
1. TC = Terminal Count = highest address value. TC + 1 = address 0.
DATA
Active
High-Z
High-Z
High-Z
High-Z
Outputs
CEO
High
Low
High
High
High
ICC
Active
Reduced
Active
Standby
Standby
DS125 (v1.0) December 16, 2003
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