English
Language : 

DS693 Datasheet, PDF (13/13 Pages) Xilinx, Inc – Integrated into Xilinx Embedded Development Kit
LogiCORE IP Virtex-5 APU Floating-Point Unit (v1.01a)
Revision History
The following table shows the revision history for this document:
Date
2/18/08
4/16/08
10/29/08
4/24/09
3/1/11
Version
0.6
1.0
1.1
1.2
1.3
Description of Revisions
Provisional Xilinx release.
Initial Xilinx release.
Incorporated CR473183; updated file info (PDF properties; updated legal matter; converted
to current template.
Incorporated CR478532; changed Core Parameter section, including Table 3; updated
figures to Xilinx graphic standard; updated for LAVA release; replaced references to
supported device families and tool name(s) with hyperlink to PDF file.
Updated for 13.1 release; incorporated CR525633; converted to current data sheet template.
Notice of Disclaimer
Xilinx is providing this product documentation, hereinafter “Information,” to you “AS IS” with no warranty of any kind, express
or implied. Xilinx makes no representation that the Information, or any particular implementation thereof, is free from any
claims of infringement. You are responsible for obtaining any rights you may require for any implementation based on the
Information. All specifications are subject to change without notice. XILINX EXPRESSLY DISCLAIMS ANY WARRANTY
WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE INFORMATION OR ANY IMPLEMENTATION BASED
THEREON, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR REPRESENTATIONS THAT THIS
IMPLEMENTATION IS FREE FROM CLAIMS OF INFRINGEMENT AND ANY IMPLIED WARRANTIES OF
MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Except as stated herein, none of the Information may be
copied, reproduced, distributed, republished, downloaded, displayed, posted, or transmitted in any form or by any means
including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise, without the prior written consent of
Xilinx.
DS693 March 1, 2011
www.xilinx.com
13
Product Specification