X5001 Datasheet, PDF (12/19 Pages) Xicor Inc. – CPU Supervisor

X5001
Figure 1. Power-Up and Power-Down Timing
VCC
V_TRIP
0 Volts
t_R
RESET (X5001)
t_PURST
t_PURST
V _TRIP
t_F
t_RPD
RESET Output Timing
Symbol
Parameter
V_TRIP
Reset Trip Point Voltage, X5001PT-4.5A
Reset Trip Point Voltage, X5001PT-4.5
Reset Trip Point Voltage, X5001PT-2.7A
Reset Trip Point Voltage, X5001PT-2.7
Reset Trip Point Voltage, X5001PT-1.8
t_PURST
Power-up Reset Timeout
t_RPD⁽⁵⁾
V_CC Detect to Reset/Output
t_F⁽⁵⁾
V_CC Fall Time
t_R⁽⁵⁾
V_CC Rise Time
V_RVALID
Reset Valid V_CC
Notes: (5) This parameter is periodically sampled and not 100% tested.
PT = Package, Temperature
Figure 2. CS vs. RESET Timing
Min.
4.50
4.25
2.85
2.55
1.70
100
0.1
0.1
1
Typ.
4.63
4.38
2.92
2.63
1.75
200
Max.
4.75
4.50
3.00
2.70
1.80
280
500
Units
V
ms
ns
ns
ns
V
CS
RESET
t _CST
t _WDO
RESET Output Timing
Symbol
t_WDO
t_CST
t_RST
Parameter
Watchdog Timeout Period,
WD₁ = 1, WD₀ = 0
WD₁ = 0, WD₀ = 1
WD₁ = 0, WD₀ = 0
CS Pulse Width to Reset the Watchdog
Reset Timeout
t_RST
t_WDO
Min.
100
450
1
400
100
t _RST
Typ.
200
600
1.4
200
Max.
300
800
2
300
Units
ms
ms
sec
ns
ms
12