W25Q32JVSFIQ-TR Datasheet, PDF (8/78 Pages) Winbond – 3V 32M-BIT SERIAL FLASH MEMORY WITH DUAL, QUAD SPI

3.6 Ball Configuration TFBGA 8x6-mm (6x4 Ball Array)
W25Q32JV
Figure 1d. W25Q32JV Ball Assignments, 24-ball TFBGA 8x6-mm (Package Code TC)
3.7 Ball Description TFBGA 8x6-mm
BALL NO.
PIN NAME
I/O
FUNCTION
A4
/RESET
I
Reset Input⁽³⁾
B2
CLK
I
Serial Clock Input
B3
GND
Ground
B4
VCC
Power Supply
C2
/CS
I
Chip Select Input
C4
/WP (IO2)
I/O
Write Protect Input (Data Input Output 2)⁽²⁾
D2
DO (IO1)
I/O
Data Output (Data Input Output 1)⁽¹⁾
D3
DI (IO0)
I/O
Data Input (Data Input Output 0)⁽¹⁾
D4
/HOLD
I/O
Hold Input (Data Input Output 3)⁽²⁾
(IO3)
Multiple
NC
No Connect
Notes:
1. IO0 and IO1 are used for Standard and Dual SPI instructions
2. IO0 – IO3 are used for Quad SPI instructions, /WP & /HOLD functions are only available for Standard/Dual SPI.
3. The /RESET pin on SOIC-16 package is independent of the HOLD/RST bit and QE bit settings in the Status Register. This pin
can be left floating, if Rest function is not needed.
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