W25Q32JVSFIQ-TR Datasheet, PDF (27/78 Pages) Winbond – 3V 32M-BIT SERIAL FLASH MEMORY WITH DUAL, QUAD SPI

W25Q32JV
Write Disable (04h)
The Write Disable instruction (Figure 7) resets the Write Enable Latch (WEL) bit in the Status Register to a
0. The Write Disable instruction is entered by driving /CS low, shifting the instruction code “04h” into the DI
pin and then driving /CS high. Note that the WEL bit is automatically reset after Power-up and upon
completion of the Write Status Register, Erase/Program Security Registers, Page Program, Quad Page
Program, Sector Erase, Block Erase, Chip Erase and Reset instructions.
/CS
CLK
Mode 3
Mode 0
DI
(IO₀)
01234567
Instruction (04h)
DO
(IO₁)
High Impedance
Figure 7. Write Disable Instruction for SPI Mode
Mode 3
Mode 0
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Publication Release Date: November 18, 2014
Preliminary-Revision A1