W25Q32JVSFIQ-TR Datasheet, PDF (68/78 Pages) Winbond – 3V 32M-BIT SERIAL FLASH MEMORY WITH DUAL, QUAD SPI

W25Q32JV
DESCRIPTION
/HOLD Not Active Setup Time relative to CLK
/HOLD Not Active Hold Time relative to CLK
/HOLD to Output Low-Z
/HOLD to Output High-Z
Write Protect Setup Time Before /CS Low
Write Protect Hold Time After /CS High
/CS High to Power-down Mode
/CS High to Standby Mode without ID Read
/CS High to Standby Mode with ID Read
/CS High to next Instruction after Suspend
/CS High to next Instruction after Reset
/RESET pin Low period to reset the device
Write Status Register Time
Page Program Time
SYMBOL
tHHCH
tCHHL
tHHQX⁽²⁾
tHLQZ⁽²⁾
tWHSL⁽³⁾
tSHWL⁽³⁾
tDP⁽²⁾
tRES1⁽²⁾
tRES2⁽²⁾
tSUS⁽²⁾
tRST⁽²⁾
tRESET⁽²⁾
tW
tPP
ALT
tLZ
tHZ
MIN
5
5
20
100
1⁽⁵⁾
SPEC
TYP
MAX
7
12
3
3
1.8
20
30
10
15
0.7
3
UNIT
ns
ns
ns
ns
ns
ns
µs
µs
µs
µs
µs
µs
ms
ms
Sector Erase Time (4KB)
tSE
45
400
ms
Block Erase Time (32KB)
tBE1
120
1,600
ms
Block Erase Time (64KB)
tBE2
150
2,000
ms
Chip Erase Time
tCE
10
50
s
Notes:
1. Clock high + Clock low must be less than or equal to 1/fC.
2. Value guaranteed by design and/or characterization, not 100% tested in production.
3. Only applicable as a constraint for a Write Status Register instruction when SRP[1:0]=(0,1).
4. It’s possible to reset the device with shorter tRESET (as short as a few hundred ns), a 1us minimum is recommended to ensure reliable
operation.
5. Tested on sample basis and specified through design and characterization data. TA = 25°C, VCC = 3.0V, 25% driver strength.
6. 4-bytes address alignment for Quad Read, start address from [A1,A0]=(0,0).
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