W79E201 Datasheet, PDF (61/87 Pages) Winbond – 8-BIT MICROCONTROLLER

W79E201
Control bits ADCCON.0, ADCCON.1 and ADCCON.2 are used to control an analog multiplexer which
selects one of eight analog channels. An ADC conversion in progress is unaffected by an external or
software ADC start. The result of a completed conversion remains unaffected provided ADCI = logic 1;
a new ADC conversion already in progress is aborted when the idle or power down mode is entered.
The result of a completed conversion (ADCI = logic 1) remains unaffected when entering the idle
mode.
ADC Resolution and Analog Supply:
The ADC has its own supply pins (AVDD and AVSS ) and one pins (Vref+) connected to each end of
the DAC’s resistance-ladder. The ladder has 1023 equally spaced taps, separated by a resistance of
“R”. The first tap is located 0.5XR above AVss, and the last tap is located 0.5XR below Vref+. This
gives a total ladder resistance of 1024XR. This structure ensures that the DAC is monotonic and
results in a symmetrical quantization error.
For input voltages between AVss and [(Vref+) + ½ LSB], the 10-bit result of an A/D conversion will be
00 0000 0000 b = 000H. For input voltages between [(Vref+) – 3/2 LSB] and Vref+, the result of a
conversion will be 11 1111 1111B = 3FFH. AVref+ and AVSS may be between AVDD + 0.2V and
AVSS – 0.2 V. Avref+ should be positive with respect to AVSS, and the input voltage (Vin) should be
between AVref+ and AVSS.
The result can always be calculated from the following formula:
Result = 1024 × ^Vin
AVref +
- 61 -
Publication Release Date: December 16, 2004
Revision A2