W79E201 Datasheet, PDF (40/87 Pages) Winbond – 8-BIT MICROCONTROLLER

W79E201
RAM contents will be indeterminate. During a power fail condition, if the power falls below 2V, the
RAM contents are lost.
After a reset most SFRs are cleared. Interrupts and Timers are disabled. The Watchdog timer is
disabled if the reset source was a POR. The ports SFRs have FFh written into them which puts the
port pins in a high state. Port 0 floats as it does not have on-chip pull-ups.
Table 6. SFR Reset Value
SFR NAME
P0
SP
DPL
DPH
PCON
TCON
TMOD
TL0
TL1
TH0
TH1
CKCON
P1
SCON
SBUF
P2
P0R
P4
IE
SADDR
CHPCON
SFRAL
SFRAH
SFRFD
SFRCN
P3
PWM5
RESET VALUE
11111111b
00000111b
00000000b
00000000b
00xx0000b
00000000b
00000000b
00000000b
00000000b
00000000b
00000000b
00000001b
11111111b
00000000b
xxxxxxxxb
11111111b
00000000b
Xxxxxxx1b
00000000b
00000000b
00000000b
00000000b
00000000b
11111111b
00111111b
11111111b
00000000b
SFR NAME
EIP
IP
SADEN
PMR
STATUT2
T2CON
T2MOD
RCAP2L
RCAP2H
TL2
TH2
PSW
WDCON
PWMP
PWMCON1
PWM0
PWM1
PWM2
PWM3
ACC
ADCCON
ADCH
ADCCEN
PWMCON2
PWM4
EIE
B
RESET VALUE
xxx00000b
x0000000b
00000000b
xxxxx0xxb
000x0000b
00000000b
00000x00b
00000000b
00000000b
00000000b
00000000b
00000000b
0x0x0xx0b
00000000b
00000000b
00000000b
00000000b
00000000b
00000000b
00000000b
xxxxx000b
xxxxxxxxb
xxxxxxx1b
00000000b
00000000b
xxx00000b
00000000b
The WDCON SFR bits are Set/Cleared in reset condition depending on the source of the reset.
External reset
Watchdog reset
Power on reset
WDCON
0x0x0xx0b
0x0x01x0b
01000000b
The POR bit WDCON.6 is set only by the power on reset. The WTRF bit WDCON.2 is set when the
Watchdog timer causes a reset. A power on reset will also clear this bit. The EWT bit WDCON.1 is
- 40 -