W79E201 Datasheet, PDF (54/87 Pages) Winbond – 8-BIT MICROCONTROLLER

W79E201
divide by 16 Counter, and not directly to the write to SBUF signal. After all 9 bits of data are
transmitted, the stop bit is transmitted. The TI flag is set in the C1 state after the stop bit has been put
out on TxD pin. This will be at the 11th rollover of the divide by 16 Counter after a write to SBUF.
Reception is enabled only if REN is high. The serial port actually starts the receiving of serial data,
with the detection of a falling edge on the RxD pin. The 1-to-0 detector continuously monitors the RxD
line, sampling it at the rate of 16 times the selected baud rate. When a falling edge is detected, the
divide by 16 Counter is immediately reset. This helps to align the bit boundaries with the rollovers of
the divide by 16 Counter. The 16 states of the counter effectively divide the bit time into 16 slices. The
bit detection is done on a best of three bases. The bit detector samples the RxD pin, at the 8th, 9th
and 10th counter states. By using a majority 2 of 3 voting system, the bit value is selected. This is
done to improve the noise rejection feature of the serial port.
OSC
2
SMOD= ₀ 1
Write to
SBUF
TB8
Internal ⁰
Data Bus
1
TX START _{TX SHIFT}
16
TX CLOCK
TI
SERIAL
16
CONTROLLE ^RI
Transmit Shift Register
D8
STOP
PARIN
START ^SOUT
LOAD
CLOCK
TXD
Serial Port
Interrupt
SAMPLE
1-TO-0
DETECTOR
RX CLOCK
RX START
LOAD
SBUF
RX SHIFT
Read
SBUF
RXD
BIT
DETECTOR
CLOCK _PAROUT
SIN
D8
Receive Shift Register
SBUF
RB8
Internal
Data
Bus
Serial Port Mode 2
If the first bit detected after the falling edge of RxD pin, is not 0, then this indicates an invalid start bit,
and the reception is immediately aborted. The serial port again looks for a falling edge in the RxD line.
If a valid start bit is detected, then the rest of the bits are also detected and shifted into the SBUF.
After shifting in 9 data bits, there is one more shift to do, after which the SBUF and RB8 are loaded
and RI is set. However certain conditions must be met before the loading and setting of RI can be
done.
1. RI must be 0 and
2. Either SM2 = 0, or the received stop bit = 1.
If these conditions are met, then the stop bit goes to RB8, the 8 data bits go into SBUF and RI is set.
Otherwise the received frame may be lost. After the middle of the stop bit, the receiver goes back to
looking for a 1-to-0 transition on the RxD pin.
Mode 3
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