W79E201 Datasheet, PDF (17/87 Pages) Winbond – 8-BIT MICROCONTROLLER

W79E201
BIT NAME
FUNCTION
Serial data on the serial port is read from or written to this location. It actually
7~0
SBUF
consists of two separate internal 8-bit registers. One is the receive resister, and the
other is the transmit buffer. Any read access gets data from the receive data buffer,
while write access is to the transmit data buffer.
ISP Control Register
Bit:
7
6
SWRST/
REBOOT
-
Mnemonic: CHPCON
5
4
LDAP
-
3
2
1
0
-
- FBOOTSL FPROGEN
Address: 9Fh
BIT
NAME
FUNCTION
7
SWRST/ _{Set this bit to launch a whole device reset that is same as asserting high to}
REBOOT RST pin, micro controller will be back to initial state and clear this bit
automatically. To read this bit, its alternate function to indicate the ISP
hardware reboot mode is invoking when reading it in high.
6
-
Reserved
5
LDAP _{This bit is Read Only. High: device is executing the program in LD Flash}
EPROM Low: device is executing the program in AP Flash EPROM.
4
-
Reserved
3
-
Reserved
2
-
Reserved
1 FBOOTSL _{Loader program residence selection. Set to high to route the device fetching}
code from LD Flash EPROM.
0 FPROGEN _{In System Programming Mode Enable. Set this bit to launch the ISP mode.}
Device will operate ISP procedures, such as Erase, Program and Read
operations, according to correlative SFRs settings. During ISP mode, device
achieves ISP operations by the way of IDLE state. In the other words, device is
not indeed in IDLE mode is set bit PCON.1 while ISP is enabled. Clear this bit
to disable ISP mode, device get back to normal operation including IDLE state.
Port 2
Bit:
7
6
5
4
3
2
1
0
P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 P2.0
Mnemonic: P2
Address: A0h
P2.7-0: Port 2 is a bi-directional I/O port with internal pull-ups. This port also provides the upper
address bits for accesses to external memory.
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Publication Release Date: December 16, 2004
Revision A2