W988D6FB_13 Datasheet, PDF (60/66 Pages) Winbond – 256Mb Mobile LPSDR

W988D6FB / W988D2FB
11.21 Timing Chart for Burst Stop Cycle (Burst Stop Command)
(1) Read cycle
01
( a ) CAS latency =2
Command Read
DQ
( b )CAS latency = 3
Command Read
DQ
234567
BST
Q0 Q1 Q2 Q3 Q4
BST
Q0 Q1 Q2 Q3 Q4
(2) Write cycle
Command Write
BST
DQ
Q0 Q1 Q2 Q3 Q4
256Mb Mobile LPSDR
8
9
10 11
Note: BST represents the Burst stop command
“Dn” = Write data, and “Qn” = Read data
11.22 Timing Chart for Burst Stop Cycle (Precharge Command)
In the case of urst
Length = 8
(1) Read cycle
012345678
(a) CAS latency =2
Command
Read
PRCG
DQ
(b) CAS latency =3
Command
Read
Q0 Q1 Q2 Q3 Q4
PRCG
DQ
(2) Write cycle
(a) CAS latency =2
Command Write
Write DQM Latency = 0
DQM
DQ
Q0 Q1
Q0 Q1 Q2 Q3 Q4
PRCG
tWR
Q2 Q3 Q4
(b) CAS latency =3
Command
Write DQM Latency = 0
DQM
DQ
Write
Q0
PRCG
tWR
Q1 Q2 Q3 Q4
Note: ^PRCG represents the Precharge command.
“Dn” = Write data, and “Qn” = Read data.
9 10 11
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Publication Release Date : August 15, 2013
Revision A01-004