W741E20X Datasheet, PDF (45/84 Pages) Winbond – 4-BIT FLASH MICROCONTROLLER

Preliminary W741E20X
Instruction Set Table 2, continued
CLR DIVR0
Reset the last 4 bits of the DIVideR 0
Machine Code:
Machine Cycle:
Operation:
Description:
CLR EVF, #I
Machine Code:
Machine Cycle:
Operation:
Description:
00010111
00000000
1
Reset the last 4 bits of the divider 0
When this instruction is executed, the last 4 bits of the divider 0 (14 bits) are
reset.
Clear EVent Flag
01000000
I7 I6 I5 I4 I3 I2 I1 I0
1
Clear event flag
The condition corresponding to the data specified by I7 to I0 is controlled.
I0~I7 Mode after execution of instruction
I0 = 1 EVF0 caused by overflow from the divider 0 is reset.
I1 = 1 ^{EVF1 caused by underflow from the timer 0 is reset.}
I2 = 1 EVF2 caused by the signal change at port RC is reset.
I3
Reserved
I4 = 1 EVF4 caused by the falling edge signal on INT pin is reset.
I5 = 1 EVF5 caused by the serial port received completely.
I6 = 1 EVF6 caused by the serial port transmitted completely.
I7 = 1 EVF7 caused by underflow from the timer 1 is reset.
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Publication Release Date: March 1998
Revision A1