W9425G8EH Datasheet, PDF (35/53 Pages) Winbond – 8M × 4 BANKS × 8 BITS DDR SDRAM

W9425G8EH
11. TIMING WAVEFORMS
11.1 Command Input Timing
tCK
CLK
CLK
CS
tCK
tIS
tIH
tCH
tCL
RAS
CAS
WE
A0~A12
BS0, 1
tIS
tIH
tIS
tIH
tIS
tIH
tIS
tIH
Refer to the Command Truth Table
11.2 Timing of the CLK Signals
CLK
CLK
CLK
CLK
tCH
tCL
tT
tT
tCK
VX
VX
VX
VIH
VIH(AC)
VIL(AC)
VIL
VIH
VIL
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Publication Release Date: Jul. 04, 2008
Revision A01