W9864G6IH Datasheet, PDF (33/43 Pages) Winbond – 1M × 4BANKS × 16BITS SDRAM

11.12 Self Refresh Cycle
W9864G6IH
(CLK = 100 MHz)
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23
CLK
CS
tRP
RAS
CAS
WE
BS0,1
A10
A0-A9,
A11
DQM
CKE
tSB
tCKS
tCKS
tCKS
DQ
Self Refresh Cycle
tXSR
No Operation / Command Inhibit
All Banks
Precharge
Self Refresh
Entry
Self Refresh
Exit
Arbitrary Cycle
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Publication Release Date:Mar. 31, 2008
Revision A05