W9864G6IH Datasheet, PDF (21/43 Pages) Winbond – 1M × 4BANKS × 16BITS SDRAM

10.4 Mode Register Set Cycle
CLK
CS
tCMS
tCMH
RAS
CAS
WE
A0-A11
BS0,1
tCMS
tCMH
tCMS tCMH
tCMS tCMH
tAS
tAH
Register
set data
A0
A1
Burst Length
A2
A3 Addressing Mode
A4
A5
CAS Latency
A6
A07 "0" (Test Mode)
A8 "0" Reserved
A09
WriteAM0 ode
A10 "0"
AA101 "0"
BS0 "0" ResAe0rved
BS1 ^"0"
W9864G6IH
tRSC
A0
A2 AA10 A0
0 A00 0
0 A00 1
0 A10 0
0 A10 1
1 A00 0
1 A00 1
1 A10 0
1 A10 1
A03
A00
A10
A6 AA50 A4
0 A00 0
0 A00 1
0 A10 0
0 A10 1
1 A00 0
A09
A00
A10
next
command
BurstAL0ength
SequAe0ntial
InteArle0ave
1
A10
A20
A20
A40
A40
A80
A80
ResAe0rved
FullAP0age
ResAe0rved
AddressAin0g Mode
SequAe0ntial
InteArle0ave
CAS LAa0tency
ResAe0rved
ResAe0rved
2
A30
Reserved
Single Write Mode
Burst read aAnd0 Burst write
Burst read anAd0single write
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Publication Release Date:Mar. 31, 2008
Revision A05