W83626F Datasheet, PDF (21/34 Pages) Winbond – LPC-to-ISA Bridge

LPC TO ISA BRIDGE SET
W83626F/W83626D
= 0 Normal used.
PRELIMINARY
CR44 (Tristate controllable Register(Power-down Mode3) , Default 0x07)
Bit 7 : =1 Enable Power-down functions.(ISOLATE# was power-on setting.)
=0 Normal used.
Bit 6 : Reserved.
Bit 5 : =1 SA10 is set as mask (ignored) bit in ADDRESS DECODER 2. The function is used to improved
the performance of ECP mode of LPT. If the decoding range is 0x378-0x37F and 0x778-0x77F
,you can set this bit to 1 for Fast Mode operation.
= 0 Normal operation.
Bit 4 : =1 SA10 is set as mask (ignored) bit in ADDRESS DECODER 1. The function is used to improved
the performance of ECP mode of LPT. If the decoding range is 0x378-0x37F and 0x778-0x77F
,you can set this bit to 1 for Fast Mode operation.
= 0 Normal operation.
Bit 3 : SERIRQ POWER DOWN SELECT.
=1 When the chip is in power down mode, the SERIRQ block is inactive.
=0 When the chip is in power down mode, the SERIRQ block is active.
Bit 2 -0 : Set SYSCLK divided ratio.(2,4,8,16,32,64)
= 000 Disable Power-down Mode3.
= 001 SYSCLK divided by 2.
= 010 SYSCLK divided by 4.
= 010 SYSCLK divided by 4
= 011 SYSCLK divided by 8
= 100 SYSCLK divided by 16
= 101 SYSCLK divided by 32
= 110 SYSCLK divided by 64
= 111 LPC I/F,all clocks and signals will be tristated.
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Publication Release Date: Feb 2000
Revision 0.50