W83194R-37 Datasheet, PDF (17/19 Pages) Winbond – 100 MHZ AGP CLOCK FOR VIA CHIPSET

Preliminary W83194R-37/-58
12.0 POWER SUPPLY SUGGESTION
1. A solid ground plane should be placed around the clock device. Ground connections should be tied
to this main ground plane as short as possible. No cuts should be made in the ground plane around
the device.
2. C21, C22, C31, C36 are decoupling capacitors (0.1 µF surface mount, low ESR, ceramic
capacitors.) They should be placed as possible as the VDD pin and the ground via.
3. C1 and C2 are supply filtering capacitors for low frequency power supply noise. A 22 µF (or 10 µF)
tantalum capacitor is recommended.
4. Use of Ferrite Bead (FB) are recommended to further reduce the power supply noise.
5. The power supply race to the VDD pins must be thick enough so that voltage drops across the trace
resistance is negligible.
FB1
VDD
(3.3V)
VDD Plane
C1
C31
1
2
3
4
5
C32
6
7
8
9
10
11
12
13
C33
14
15
16
17
18
C34
19
20
21
22
23
24
VDD2 Plane
FB2
VDD2
(3.3Vor2.5V)
48
C21
C2
47
46
45
44
43
42
C22
41
40
39
38
37
36
C36
35
34
33
32
31
30
C35
29
28
27
26
25
- 17 -
Publication Release Date: April 1999
Revision A1