W83977EF Datasheet, PDF (120/150 Pages) Winbond – WINBOND I/O

W83977EF
Bit 0: URBTRAPSTS. UART B trap status.
= 0 UART B is now in the sleeping state.
= 1 UART B is now in the workinging state due to any UART B access, any IRQ, the
receiver begins receiving a start bit, the transmitter shift register begins
transmitting a
start bit, and any transition on MODEM control input lines.
CRF3 (Default 0x00)
Bit 7: Reserved. Return zero when read.
Bit 6 - 0: Device's IRQ status.
These bits indicate the IRQ status of the individual device respectively. The device's IRQ status bit
is set by their source device and is cleared by writing a 1. Writing a 0 has no effect.
Bit 6: URCIRQSTS. UART C IRQ status.
Bit 5: MOUIRQSTS. MOUSE IRQ status.
Bit 4: KBCIRQSTS. KBC IRQ status.
Bit 3: PRTIRQSTS. printer port IRQ status.
Bit 2: FDCIRQSTS. FDC IRQ status.
Bit 1: URAIRQSTS. UART A IRQ status.
Bit 0: URBIRQSTS. UART B IRQ status.
CRF4 (Default 0x00)
Bit 7 - 5: Reserved. Return zero when read.
Bit 3: Reserved. Return zero when read.
Bit 4 and Bit 2 - 0:These bits indicate the status of the individual GPIO function respectively. The
status is set by their source function and is cleared by writing a 1. Writing a 0 has no effect.
Bit 4: WDTIRQSTS. Watch dog timer IRQ status at logical device 8.
Bit 2: COMIRQSTS. Common IRQ status of GP20 - GP25 at logical device 8.
Bit 1: GP11IRQSTS. GP11 interrupt steering status at logical device 7.
Bit 0: GP10IRQSTS. GP10 interrupt steering status at logical device 7.
CRF6 (Default 0x00)
Bit 7: Reserved. Return zero when read.
Bit 6 - 0: Enable bits of the SMI#/SCI# generation due to the device's IRQ.
These bits enable the generation of an SMI#/SCI# interrupt due to any IRQ of the devices.
SMI#/SCI# logic output = (URBIRQEN and URBIRQSTS) or (URAIRQEN and URAIRQSTS) or
(FDCIRQEN and FDCIRQSTS) or (PRTIRQEN and PRTIRQSTS) or (KBCIRQEN and
KBCIRQSTS) or (MOUIRQEN and MOUIRQSTS) or (URCIRQEN and URCIRQSTS) or
(WDTIRQEN and
WDTIRQSTS) or (COMIRQEN and COMIRQSTS) or (GP11IRQEN and
GP11IRQSTS) or
(GP10IRQEN and GP10IRQSTS)
Bit 6: URCIRQEN.
= 0 disable the generation of an SMI#/SCI# interrupt due to UART C's IRQ.
= 1 enable the generation of an SMI#/SCI# interrupt due to UART C's IRQ.
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Publication Release Date: April 2003
Revision 1.1