TA1310ANG Datasheet, PDF (85/106 Pages) Toshiba Semiconductor – NTSC VIDEO, CHROMA, DEFLECTION, AND DISTORTION COMPENSATION IC (WITH YUV INTERFACE AND ACB)

TA1310ANG
NOTE
ITEM
D₃₄ Vertical Output Pulse Width
RGB Output Vertical
D₃₅
Blanking Pulse Start
PhaseRGB Output Vertical
Blanking Pulse Stop Phase
V Cycle Black Peak
D₃₆ Detection Disable Pulse
(Normal)
V Cycle Black Peak
D₃₇ Detection Disable Pulse
(Zoom)
SW MODE
SW₃₄ SW₃₈
TEST CONDITIONS (DEF V_CC = 9 V, Ta = 25 ± 3°C, BUS DATA = POWER-ON RESET)
MEASUREMENT METHOD
OFF
C
Input a composite video signal to TP38, then measure the #33 (VD out) vertical pulse delay T_D and pulse width T_W in relation to the
vertical sync signal of #38 (Sync in).
OFF
Input a composite video signal to TP38, then measure the #13 (R out) waveform phase difference VR_S1 and pulse width VR_S2 in
relation to the #38 (Sync in) waveform.
C _{Repeat measurement on #14 and #15.}
Set the subaddress (11) D₄~D₁ to (1111) and the subaddress (12) D₄~D₁ to (1111).
OFF C Input a composite video signal to TP38 and measure the V cycle black peak detection disable pulse period of #55 (BLACK PEAK DET).
OFF
C
Under the conditions in D₃₈ above, set the subaddress (0C) D1 to (1) and measure the V cycle black peak detection disable period of
#55.
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2005-09-20