TA1310ANG Datasheet, PDF (82/106 Pages) Toshiba Semiconductor – NTSC VIDEO, CHROMA, DEFLECTION, AND DISTORTION COMPENSATION IC (WITH YUV INTERFACE AND ACB)

NOTE
ITEM
SW MODE
SW₃₄ SW₃₈
D₂₂
Clamp Pulse Start Phase
Clamp Pulse Width
OFF A
TA1310ANG
TEST CONDITIONS (DEF V_CC = 9 V, Ta = 25 ± 3°C, BUS DATA = POWER-ON RESET)
MEASUREMENT METHOD
Set the subaddress (01) D₇ to (0), set the subaddress (05) D₃~D₁ to (001), and set the subaddress (0C) D₀ to
(1).
Input a signal as shown at left to TP38 from TG7, then measure
the #32 (HD out) waveform phase difference CP_S and pulse width
CP_W in relation to the #40 (AFC1 FILTER) waveform.
HD Output Start Phase
D₂₃ HD Output Pulse Width
HD Output Amplitude
OFF A
Gate Pulse Start Phase
D₂₄
Gate Pulse Width
OFF A
Input a signal as shown at left to TP38 from TG7, then measure
the #32 (HD out) waveform phase difference HD_S and pulse width
HD_W and V_HD in relation to the #40 (AFC1 FILTER) waveform.
Input a signal as shown at left to TP38 from TG7, then measure
the #34 (FBP in) waveform phase difference GP_S and pulse width
GP_W in relation to the #40 (AFC1 FILTER) waveform.
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2005-09-20