TH50VSF2580AASB Datasheet, PDF (35/50 Pages) Toshiba Semiconductor – SRAM AND FLASH MEMORY MIXED MULTI-CHIP PACKAGE

FLASH COMMAND WRITE OPERATION
TH50VSF2580/2581AASB
This is the timing of the Command Write Operation. The timing which is described in the following pages is
essentially the same as the timing shown on this page.
• WE Control
Address
t_CMD
Command address
t_AS
t_AH
t_AHW
CEF
t_CES
t_CEH
WE
D_IN
t_WELH
t_DS
t_WEHH
t_DH
Command data
• CEF Control
Address
CEF
WE
D_IN
t_CMD
Command address
t_AS
t_AH
t_WES
t_CELH
t_CEHH
t_WEH
t_DS
t_DH
Command data
2001-10-26 35/50