TH50VSF2580AASB Datasheet, PDF (17/50 Pages) Toshiba Semiconductor – SRAM AND FLASH MEMORY MIXED MULTI-CHIP PACKAGE

AC CHARACTERISTICS (FLASH MEMORY)
READ CYCLE
SYMBOL
t_RC
t_ACC
t_CE
t_OE
t_CEE
t_OEE
t_OEH
t_OH
t_DF1
t_DF2
Read Cycle Time
Address Access Time
CEF Access Time
OE Access Time
CEF to Output Low-Z
OE to Output Low-Z
OE Hold Time
Output Data Hold Time
CEF to Output Hi-Z
OE to Output Hi-Z
PARAMETER
BLOCK PROTECT
SYMBOL
t_VPS
t_CESP
t_VPH
t_PPLH
V_ID Set-up Time
CEF Set-up Time
OE Hold Time
WE Low-Level Hold Time
PARAMETER
PROGRAM AND ERASE CHARACTERISTICS
SYMBOL
PARAMETER
t_PPW
t_PCEW
t_PBEW
t_EW
*: typ.
Auto-Program Time (Byte Mode)
Auto-Program Time (Word Mode)
Auto Chip Erase Time
Auto Block Erase Time
Erase/Program Cycle
TH50VSF2580/2581AASB
MIN
MAX
90


90

90

40
0

0

0

0


30

30
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MIN
MAX
UNIT
4

µs
4

µs
4

µs
100

µs
MIN
MAX
UNIT
8*
300
µs
11*
300
µs
50*
710
s
0.7*
10
s
10⁵

Cycles
2001-10-26 17/50