TH50VSF2580AASB Datasheet, PDF (3/50 Pages) Toshiba Semiconductor – SRAM AND FLASH MEMORY MIXED MULTI-CHIP PACKAGE

BLOCK DIAGRAM
A0~A21
WP/ACC
RESET
CEF
A0~A21
TH50VSF2580/2581AASB
V_CCf
V_SS
32-Mbit
Flash Memory
DQ0~DQ15
(DQ0~DQ7)
RY/BY
CIOF
A0~A17
V_CCs
V_SS
DQ0~DQ15
SA
WE
OE
CE1S
CE2S
UB
LB
CIOS
4-Mbit
SRAM Memory
DQ0~DQ15
(DQ0~DQ7)
MODE SELECTION
OPERATION MODE CEF CE1S CE2S OE WE RESET UB LB WP/ACC DQ0~DQ7 DQ8~DQ15
Flash Read
L
H
X
L
H
H
X
X
X
L
X
L
L
H
H
X
X
X
H
L
H
L
H
H
L
L
X
SRAM Read
H
L
H
L
H
H
H
L
X
H
L
H
L
H
H
L
H
X
Flash Write
L
H
X
H
L
H
X
X
X
L
X
L
H
L
H
X
X
X
H
L
H
X
L
H
L
L
X
SRAM Write
H
L
H
X
L
H
H
L
X
H
L
H
X
L
H
L
H
X
Flash Output Disable
X
H
X
H
H
X
X
X
X
X
X
L
H
H
X
X
X
X
H
X
X
H
H
X
X
X
X
SRAM Output Disable
H
X
X
X
X
X
H
H
X
Flash Standby
H
X
X
X
X
H
X
X
X
Flash Hardware
Reset / Standby
X
X
X
X
X
L
X
X
X
SRAM Standby
X
H
X
X
X
X
X
X
X
X
X
L
X
X
X
X
X
X
Notes: L = V_IL; H = V_IH; X = V_IH or V_IL
F: Depends on flash memory operation mode.
S: Depends on SRAM operation mode.
When CIOS = V_CC and CIOF = V_CC, Word Mode is selected for both SRAM and flash memory.
Does not apply when CEF = CE1S = V_IL and CE2S = V_IH at the same time.
D_OUT
D_OUT
D_OUT
D_OUT
Hi-Z
D_IN
D_IN
D_IN
D_IN
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
S
S
F
F
D_OUT
D_OUT
D_OUT
Hi-Z
D_OUT
D_IN
D_IN
D_IN
Hi-Z
D_IN
Hi-Z
Hi-Z
Hi-Z
Hi-Z
S
S
F
F
2001-10-26 3/50