TH50VSF2580AASB Datasheet, PDF (28/50 Pages) Toshiba Semiconductor – SRAM AND FLASH MEMORY MIXED MULTI-CHIP PACKAGE

TH50VSF2580/2581AASB
ADDRESS A6~A0
2CH
2DH
2EH
2FH
30H
31H
32H
33H
34H
40H
41H
42H
43H
44H
45H
46H
47H
48H
49H
4AH
4BH
4CH
4DH
4EH
4FH
50H
DATA DQ15~DQ0
0002H
0007H
0000H
0020H
0000H
003EH
0000H
0000H
0001H
0050H
0052H
0049H
0031H
0031H
0000H
0002H
0001H
0001H
0004H
0001H
0000H
0000H
0085H
0095H
000XH
0001H
DESCRIPTION
Number of erase block regions within device
Erase Block Region 1 information
Bits 0~15: y = block number
Bits 16~31: z = block size
(z × 256 bytes)
Erase Block Region 2 information
ASCII string “PRI”
Major version number, ASCII
Minor version number, ASCII
Address-Sensitive Unlock
0: Required
1: Not required
Erase Suspend
0: Not supported
1: For Read-only
2: For Read & Write
Block Protect
0: Not supported
X: Number of blocks per group
Block Temporary Unprotect
0: Not supported
1: Supported
Block Protect/Unprotect scheme
Simultaneous operation
0: Not supported
1: Supported
Burst Mode
0: Not supported
Page Mode
0: Not supported
V_ACC (min) voltage
DQ7~DQ4: 1 V
DQ3~DQ0: 100 mV
V_ACC (max) voltage
DQ7~DQ4: 1 V
DQ3~DQ0: 100 mV
Top/Bottom Boot Block Flag
2: TH50VSF2580AASB
3: TH50VSF2581AASB
Program suspend
0: Not supported
1: Supported
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