TH50VSF2580AASB Datasheet, PDF (19/50 Pages) Toshiba Semiconductor – SRAM AND FLASH MEMORY MIXED MULTI-CHIP PACKAGE

SIMULTANEOUS READ/WRITE OPERATION
TH50VSF2580/2581AASB
The TH50VSF2580/2581AASB features a Simultaneous Read/Write operation. The Simultaneous Read/Write
operation enables the device to simultaneously write data to or erase data from a bank while reading data from
another bank.
The TH50VSF2580/2581AASB has a total of nine banks: 1 bank of 0.5 Mbits, 1 bank of 3.5 Mbits and 7 banks of
4 Mbits. Banks can be switched between using the bank addresses (A20~A15). For a description of bank blocks and
addresses, please refer to the Block Address Table and Block Size Table.
The Simultaneous Read/Write operation cannot perform multiple operations within a single bank. The table
below shows the operation modes in which simultaneous operation can be performed.
Note that during Auto-Program execution or Auto Block Erase operation, the Simultaneous Read/Write operation
cannot read data from addresses in the same bank which have not been selected for operation. Data from these
addresses can be read using the Program Suspend or Erase Suspend function, however.
SIMULTANEOUS READ/WRITE OPERATION
STATUS OF BANK ON WHICH OPERATION IS BEING
PERFORMED
STATUS OF OTHER BANKS
Read Mode
ID Read Mode⁽¹⁾
Auto-Program Mode
Fast Program Mode⁽²⁾
Program Suspend Mode
Auto Block Erase Mode
Auto Multiple Block Erase Mode⁽³⁾
Read Mode
Erase Suspend Mode
Program Suspend during Erase Suspend
CFI Mode
(1) Only Command Mode is valid.
(2) Including times when Acceleration Mode is in use.
(3) If the selected blocks are spread across all nine banks, simultaneous operation cannot be carried out.
OPERATION MODES
In addition to the Read, Write and Erase Modes, the TH50VSF2520/2581AASB features many functions
including block protection and data polling. When incorporating the device into a deign, please refer to the timing
charts and flowcharts in combination with the description below.
Read Mode
To read data from the memory cell array, set the device to Read Mode. In Read Mode the device can perform
high-speed random access as asynchronous ROM.
The device is automatically set to Read Mode immediately after power-on or on completion of automatic
operation. A software reset releases ID Read Mode and the lock state which the device enters if automatic
operation ends abnormally, and sets the device to Read Mode. A hardware reset terminates operation of the
device and resets it to Read Mode. When reading data without changing the address immediately after
power-on, either input a hardware Reset or change CEF from H to L.
2001-10-26 19/50