TM4C129DNCPDT Datasheet, PDF (963/1946 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C129DNCPDT Microcontroller
Note: The value for n can be 1, 2, 3, or 4 for CTR mode and is ½ for ICM mode.
CFB Mode
Figure 13-5 on page 963 shows the full block (128 bits) CFB mode of operation for encryption and
decryption. The input for the cryptographic core is the IV; the result is XORed with the data. The
result is fed back through the IV register as the next input for the cryptographic core. The decryption
operation is reversed, but the cryptographic core still performs encryption.
Figure 13-5. AES - CFB Feedback Mode
Input buffer
(plain text)
Input buffer
(cipher text)
128
IV register
128
data_in
IV register
128
data_in
Key in
Key register
256
AES core
(encrypt)
128
Key in
Key register
256
AES core
(encrypt)
128
128
128
data_out
128
data_out
Temporary
128
128
register
Temporary
128
128
register
Output buffer
(cipher text)
Output buffer
(plain text)
Encryption
Decryption
F8 Mode
Figure 13-6 on page 964 shows the F8 feedback mode of operation for encryption and decryption.
The input to the cryptographic core is the result of the XOR operation of the previous cryptographic
core output, a constant IV, and a block counter. The output of the cryptographic core is XORed with
the input to create the result. In this mode, encryption and decryption use the same operations.
June 18, 2014
963
Texas Instruments-Production Data