THS8083 Datasheet, PDF (9/61 Pages) Texas Instruments – Triple 8-Bit, 80 MSPS, 3.3-V Video and Graphics Digitizer With Digital PLL

1.2 Functional Block Diagram
CS ^{AVSS_REF VMID AVDD_REF}
VREFTO_CHn VREFBO_CHn _OE
VCM
CH1_IN
AVDD_CH1
AVSS_CH1
CH2_IN
AVDD_CH2_3
AVSS_CH2_3
CH3_IN
Slicer
Clamp
Bandgap
Reference
Programmable
Variable Gain
Amplifier
Clamp
Programmable
Variable Gain
Amplifier
Clamp
Programmable
Variable Gain
Amplifier
Reference
Generator
ADC
ADC1_OUT
Reference
Generator
ADC
Output
ADC2_OUT _Formatter
Reference
Generator
ADC
ADC3_OUT
CH1A (0–7)
CH1B (0–7)
CH2A (0–7)
CH2B (0–7)
CH3A (0–7)
CH3B (0–7)
EXT_CLP
HS
VS
LOCK
PFD_FREEZE
EXT_ADCCLK
Noise
Gates
Clamp
Timing
Generator
CLP
PLL
XTL1
XTL2
DVDD_PLL _DHS
DTOCLK3
DVSS_PLL
ADCCLK2
AVDD_PLL
AVSS_PLL
VSS
DVDD
DVSS
Control
Interface
(I2C)
SCAN_TEST
RESET
SDA
SCL
DATACLK11
I2CA
1–3