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MSP430F677X_16 Datasheet, PDF (87/162 Pages) Texas Instruments – Polyphase Metering SoCs
ECCN 5E002 TSPA - Technology / Software Publicly Available
MSP430F677x, MSP430F676x, MSP430F674x
www.ti.com
SLAS768D – SEPTEMBER 2012 – REVISED DECEMBER 2013
SD24_B, AC Performance
fSD24 = 1 MHz, SD24OSRx = 256, SD24REFON = 1
PARAMETER
TEST CONDITIONS
SD24GAIN: 1
SD24GAIN: 2
SD24GAIN: 4
SINAD
Signal-to-noise +
distortion ratio
SD24GAIN: 8
SD24GAIN: 16
fIN = 50Hz(1)
SD24GAIN: 32
SD24GAIN: 64
SD24GAIN: 128
THD
Total harmonic distortion
SD24GAIN: 1
SD24GAIN: 8
SD24GAIN: 32
fIN = 50Hz(1)
VCC
MIN TYP MAX UNIT
3V
84
86
3V
85
3V
84
3V
81
83
dB
3V
80
3V
71
73
3V
67
3V
61
3V
95
3V
90
dB
3V
86
(1) The following voltages were applied to the SD24_B inputs: VI,A+(t) = 0 V + VPP/2 × sin(2π × fIN × t) and VI,A-(t) = 0 V - VPP/2 × sin(2π ×
fIN × t)
resulting in a differential voltage of VID = VI,A+(t) - VI,A-(t) = VPP × sin(2π × fIN × t) with VPP being selected as the maximum value allowed
for a given range (according to SD24_B recommended operating conditions).
SD24_B, AC Performance
fSD24 = 2 MHz, SD24OSRx = 512, SD24REFON = 1
PARAMETER
TEST CONDITIONS
SD24GAIN: 1
SD24GAIN: 2
SD24GAIN: 4
SINAD
Signal-to-noise +
distortion ratio
SD24GAIN: 8
SD24GAIN: 16
fIN = 50Hz(1)
SD24GAIN: 32
SD24GAIN: 64
SD24GAIN: 128
VCC
MIN TYP MAX UNIT
3V
87
3V
85
3V
84
3V
83
dB
3V
81
3V
76
3V
71
3V
65
(1) The following voltages were applied to the SD24_B inputs: VI,A+(t) = 0 V + VPP/2 × sin(2π × fIN × t) and VI,A-(t) = 0 V - VPP/2 × sin(2π ×
fIN × t)
resulting in a differential voltage of VID = VI,A+(t) - VI,A-(t) = VPP × sin(2π × fIN × t) with VPP being selected as the maximum value allowed
for a given range (according to SD24_B recommended operating conditions).
SD24_B, AC Performance
fSD24 = 32 kHz, SD24OSRx = 512, SD24REFON = 1
PARAMETER
TEST CONDITIONS
SD24GAIN: 1
SD24GAIN: 2
SD24GAIN: 4
SINAD
Signal-to-noise +
distortion ratio
SD24GAIN: 8
SD24GAIN: 16
fIN = 50Hz(1)
SD24GAIN: 32
SD24GAIN: 64
SD24GAIN: 128
VCC
MIN TYP MAX UNIT
3V
89
3V
85
3V
84
3V
82
dB
3V
80
3V
76
3V
67
3V
61
(1) The following voltages were applied to the SD24_B inputs: VI,A+(t) = 0 V + VPP/2 × sin(2π × fIN × t) and VI,A-(t) = 0 V - VPP/2 × sin(2π ×
fIN × t)
resulting in a differential voltage of VID = VI,A+(t) - VI,A-(t) = VPP × sin(2π × fIN × t) with VPP being selected as the maximum value allowed
for a given range (according to SD24_B recommended operating conditions).
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87