MSP430F677X_16 Datasheet, PDF (46/162 Pages) Texas Instruments – Polyphase Metering SoCs

ECCN 5E002 TSPA - Technology / Software Publicly Available
MSP430F677x, MSP430F676x, MSP430F674x
SLAS768D – SEPTEMBER 2012 – REVISED DECEMBER 2013
Table 38. Port Mapping for Port P4 (Base Address: 01E0h)
REGISTER DESCRIPTION
Port P4.0 mapping register
Port P4.1 mapping register
Port P4.2 mapping register
Port P4.3 mapping register
Port P4.4 mapping register
Port P4.5 mapping register
Port P4.6 mapping register
Port P4.7 mapping register
REGISTER
P4MAP0
00h
P4MAP1
01h
P4MAP2
02h
P4MAP3
03h
P4MAP4
04h
P4MAP5
05h
P4MAP6
06h
P4MAP7
07h
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OFFSET
Table 39. Port P1, P2 Registers (Base Address: 0200h)
REGISTER DESCRIPTION
Port P1 input
Port P1 output
Port P1 direction
Port P1 pullup/pulldown enable
Port P1 drive strength
Port P1 selection 0
Port P1 selection 1
Port P1 interrupt vector word
Port P1 interrupt edge select
Port P1 interrupt enable
Port P1 interrupt flag
Port P2 input
Port P2 output
Port P2 direction
Port P2 pullup/pulldown enable
Port P2 drive strength
Port P2 selection 0
Port P2 selection 1⁽¹⁾
Port P2 interrupt vector word
Port P2 interrupt edge select
Port P2 interrupt enable
Port P2 interrupt flag
REGISTER
P1IN
P1OUT
P1DIR
P1REN
P1DS
P1SEL0
P1SEL1
P1IV
P1IES
P1IE
P1IFG
P2IN
P2OUT
P2DIR
P2REN
P2DS
P2SEL0
P2SEL1
P2IV
P2IES
P2IE
P2IFG
(1) P2SEL1 is an empty control register to be consistent with P1SEL1 in 16-bit access.
OFFSET
00h
02h
04h
06h
08h
0Ah
0Ch
0Eh
18h
1Ah
1Ch
01h
03h
05h
07h
09h
0Bh
0Dh
1Eh
19h
1Bh
1Dh
46
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