MSP430F5510_17 Datasheet, PDF (85/118 Pages) Texas Instruments – Mixed-Signal Microcontrollers

www.ti.com
to XT1
MSP430F5510, MSP430F5509, MSP430F5508
MSP430F5507, MSP430F5506, MSP430F5505, MSP430F5504
MSP430F5503, MSP430F5502, MSP430F5501, MSP430F5500
SLAS645J – JULY 2009 – REVISED APRIL 2015
Pad Logic
P5REN.5
P5DIR.5
P5OUT.5
Module X OUT
P5SEL.4
XT1BYPASS
P5SEL.5
P5IN.5
Module X IN
0
1
0
1
EN
D
DV_SS
0
DV_CC
1
1
P5DS.5
0: Low drive
1: High drive
Bus
Keeper
P5.5/XOUT
Table 6-51. Port P5 (P5.4 and P5.5) Pin Functions
PIN NAME (P7.x)
x
FUNCTION
P5DIR.x
CONTROL BITS OR SIGNALS⁽¹⁾
P5SEL.4
P5SEL.5
XT1BYPASS
P5.4/XIN
4 P5.4 (I/O)
XIN crystal mode⁽²⁾
XIN bypass mode⁽²⁾
I: 0; O: 1
0
X
X
X
1
X
0
X
1
X
1
P5.5/XOUT
5 P5.5 (I/O)
I: 0; O: 1
0
0
X
XOUT crystal mode⁽³⁾
X
1
X
0
P5.5 (I/O)⁽³⁾
X
1
0
1
(1) X = Don't care
(2) Setting P5SEL.4 causes the general-purpose I/O to be disabled. Pending the setting of XT1BYPASS, P5.4 is configured for crystal
mode or bypass mode.
(3) Setting P5SEL.4 causes the general-purpose I/O to be disabled in crystal mode. When using bypass mode, P5.5 can be used as
general-purpose I/O.
Copyright © 2009–2015, Texas Instruments Incorporated
Detailed Description
85
Submit Documentation Feedback
Product Folder Links: MSP430F5510 MSP430F5509 MSP430F5508 MSP430F5507 MSP430F5506 MSP430F5505
MSP430F5504 MSP430F5503 MSP430F5502 MSP430F5501 MSP430F5500