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MSP430F5510_17 Datasheet, PDF (17/118 Pages) Texas Instruments – Mixed-Signal Microcontrollers
www.ti.com
MSP430F5510, MSP430F5509, MSP430F5508
MSP430F5507, MSP430F5506, MSP430F5505, MSP430F5504
MSP430F5503, MSP430F5502, MSP430F5501, MSP430F5500
SLAS645J – JULY 2009 – REVISED APRIL 2015
5 Specifications
5.1 Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
Voltage applied at VCC to VSS
Voltage applied to any pin (excluding VCORE, VBUS, V18)(2)
Diode current at any device pin
–0.3
4.1
V
–0.3
VCC + 0.3
V
±2
mA
Maximum junction temperature, TJ
Storage temperature, Tstg(3)
95
°C
–55
150
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages referenced to VSS. VCORE is for internal device use only. No external dc loading or voltage should be applied.
(3) Higher temperature may be applied during board soldering according to the current JEDEC J-STD-020 specification with peak reflow
temperatures not higher than classified on the device label on the shipping boxes or reels.
5.2 ESD Ratings
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
V(ESD) Electrostatic discharge Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
VALUE
±1000
±250
UNIT
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Pins listed as
±1000 V may actually have higher performance.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Pins listed as ±250 V
may actually have higher performance.
5.3 Recommended Operating Conditions
Typical values are specified at VCC = 3.3 V and TA = 25°C (unless otherwise noted)
VCC
VCC,USB
VSS
TA
TJ
CVCORE
CDVCC/
CVCORE
PMMCOREVx = 0
Supply voltage during program execution and flash
programming(AVCC = DVCC)(1)(2)
PMMCOREVx = 0, 1
PMMCOREVx = 0, 1, 2
PMMCOREVx = 0, 1, 2, 3
PMMCOREVx = 0
Supply voltage during USB operation, USB PLL disabled,
USB_EN = 1, UPLLEN = 0
PMMCOREVx = 0, 1
PMMCOREVx = 0, 1, 2
PMMCOREVx = 0, 1, 2, 3
Supply voltage during USB operation, USB PLL enabled(3), PMMCOREVx = 2
USB_EN = 1, UPLLEN = 1
PMMCOREVx = 2, 3
Supply voltage (AVSS = DVSS1/2 = DVSS)
Operating free-air temperature
I version
Operating junction temperature
Capacitor at VCORE(4)
I version
Capacitor ratio of DVCC to VCORE
MIN NOM MAX UNIT
1.8
3.6
2.0
3.6
V
2.2
3.6
2.4
3.6
1.8
3.6
2.0
3.6
2.2
3.6
V
2.4
3.6
2.2
3.6
2.4
3.6
0
V
–40
85 °C
–40
85 °C
470
nF
10
(1) TI recommends powering AVCC and DVCC from the same source. A maximum difference of 0.3 V between AVCC and DVCC can be
tolerated during power up and operation.
(2) The minimum supply voltage is defined by the supervisor SVS levels when it is enabled. See the Section 5.22 threshold parameters for
the exact values and further details.
(3) USB operation with USB PLL enabled requires PMMCOREVx ≥ 2 for proper operation.
(4) A capacitor tolerance of ±20% or better is required.
Copyright © 2009–2015, Texas Instruments Incorporated
Specifications
17
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Product Folder Links: MSP430F5510 MSP430F5509 MSP430F5508 MSP430F5507 MSP430F5506 MSP430F5505
MSP430F5504 MSP430F5503 MSP430F5502 MSP430F5501 MSP430F5500