TLK1501_12 Datasheet, PDF (8/32 Pages) Texas Instruments – 0.6 TO 1.5 GBPS TRANSCEIVER

TLK1501
0.6 TO 1.5 GBPS TRANSCEIVER
SLLS428F − JUNE 2000 − REVISED JANUARY 2004
detailed description (continued)
transmission latency
The data transmission latency of the TLK1501 is defined as the delay from the initial 16-bit word load to the serial
transmission of bit 0. The transmit latency is fixed once the link is established. However, due to silicon process
variations and implementation variables such as supply voltage and temperature, the exact delay varies slightly.
The minimum transmit latency (T_latency ) is 34 bit times; the maximum is 38 bit times. Figure 3 illustrates the
timing relationship between the transmit data bus, the GTX_CLK and serial transmit terminals.
Transmitted 20-Bit Word
DOUTTXP,
DOUTTXN
TXD[0−15]
(Tlatency)†
16-Bit Word to Transmit
GTX_CLK
† _{Non-Jedec symbol}
Figure 3. Transmitter Latency
8-bit/10-bit encoder
All true serial interfaces require a method of encoding to insure minimum transition density so that the receiving
PLL has a minimal number of transitions to stay locked on. The encoding scheme maintains the signal dc
balance by keeping the number of ones and zeros the same. This provides good transition density for clock
recovery and improves error checking. The TLK1501 uses the 8-bit/10-bit encoding algorithm that is used by
the fibre channel and the gigabit ethernet. This is transparent to the user, as the TLK1501 internally encodes
and decodes the data such that the user reads and writes actual 16-bit data.
The 8-bit/10-bit encoder converts 8-bit wide data to a 10-bit wide encoded data character to improve its
transmission characteristics. Since the TLK1501 is a 16-bit wide interface, the data is split into two 8-bit wide
bytes for encoding. Each byte is fed into a separate encoder. The encoding is dependant upon two additional
input signals, the TX_EN and TX_ER. When the TX_EN is asserted and the TX_ER deasserted, then the data
bits TXD[0:15] are encoded and transmitted normally. When the TX_EN is deasserted, and TX_ER is asserted,
then the encoder generates a carrier extend consisting of two K23.7 (F7F7) codes. If the TX_EN and the TX_ER
are both asserted, then the encoder generates a K30.7 (FEFE) code. Table 1 provides the transmit data control
decoding. Since the data is transmitted in 20-bit serial words, K codes indicating carrier extend and transmit
error propagation are transmitted as two 10-bit K-codes.
TX_EN
0
0
1
1
Table 1. Transmit Data Controls
TX_ER
0
1
0
1
ENCODED 20 BIT OUTPUT
IDLE (< K28.5, D5.6 > or < K28.5, D16.2 >)
Carrier extend (K23.7, K23.7)
Normal data character
Transmit error propagation (K30.7, K30.7)
8
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265