TLK1501_12 Datasheet, PDF (6/32 Pages) Texas Instruments – 0.6 TO 1.5 GBPS TRANSCEIVER

TLK1501
0.6 TO 1.5 GBPS TRANSCEIVER
SLLS428F − JUNE 2000 − REVISED JANUARY 2004
Terminal Functions (Continued)
TERMINAL
NAME
NO.
RX_CLK
41
RX_ER/
29
PRBS_PASS
RX_DV/
30
LOS
TESTEN
27
TXD0
62
TXD1
63
TXD2
64
TXD3
2
TXD4
3
TXD5
4
TXD6
6
TXD7
7
TXD8
10
TXD9
11
TXD10
12
TXD11
14
TXD12
15
TXD13
16
TXD14
17
TXD15
19
TX_EN
20
TX_ER
22
VDD
VDDA
1, 9,
23, 38,
48
55, 57
TYPE
DESCRIPTION
O Recovered clock (low on power up). Output clock that is synchronized to RXD, RX_ER,
RX_DV/LOS. RX_CLK is the recovered serial data rate clock divided by 20. RX_CLK is held low
during power-on reset.
O Receive error (Hi-Z on power up). When RX_ER and RX_DV/LOS are asserted, indicates that
an error was detected somewhere in the frame presently being output on the receive data bus.
When RX_ER is asserted and RX_DV/LOS is deasserted, indicates that carrier extension data
is being presented. RX_ER is in high-impedance state during power-on reset.
When PRBSEN= low (deasserted), this terminal is used to indicate receive error (RX_ER).
When PRBSEN = high (asserted), this terminal indicates status of the PRBS test results
(High=pass).
O Receive data valid. RX_DV/LOS is output by the transceiver to indicate that recovered and
decoded data is being output on the receive data bus. RX_DV/LOS is asserted continously from
the first recovered word of the frame through the final recovered word and is deasserted prior
to the first rising edge of RX_CLK that follows the final word. RX_DV/LOS is in high-impedance
state during power-on reset.
If, during normal operation, the differential signal amplitude on the serial receive pins is below
200 mV, RX_DV/LOS is asserted high along with RX_ER and the receive data bus to indicate
a loss of signal condition. If the device is in power-down mode, RX_DV/LOS is the output of the
signal detect circuit and is asserted low when a loss of signal condition is detected.
I
Test mode enable (w/pulldown). This terminal should be left unconnected or tied low.
I
Transmit data bus. These inputs carry the 16-bit parallel data output from a protocol device to
the transceiver for encoding, serialization, and transmission. This 16-bit parallel data is clocked
into the transceiver on the rising edge of GTX_CLK as shown in Figure 10.
I
Transmit enable (w/pulldown). TX_EN in combination with TX_ER indicates the protocol device
is presenting data on the transmit data bus for transmission. TX_EN must be asserted high with
the first word of the preamble and remain asserted while all words to be transmitted are
presented on the transmit data bus(TXD). TX_EN must be negated prior to the first rising edge
of GTX_CLK following the final word of a frame.
I
Transmit error coding (w/pulldown). When TX_ER and TX_EN are high, indicates that the
transceiver generates an error somewhere in the frame presently being transferred. When
TX_ER is asserted and TX_EN is deasserted, indicates the protocol device is presenting carrier
extension data. When TX_ER is deasserted with TX_EN asserted, indicates that normal data
is being presented.
Digital logic power. Provides power for all digital circuitry and digital I/O buffers.
Analog power. VDDA provides a supply reference for the high-speed analog circuits, receiver and
transmitter
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