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TLK1501_12 Datasheet, PDF (11/32 Pages) Texas Instruments – 0.6 TO 1.5 GBPS TRANSCEIVER
TLK1501
0.6 TO 1.5 GBPS TRANSCEIVER
SLLS428F − JUNE 2000 − REVISED JANUARY 2004
comma detect and 8-bit/10-bit decoding (continued)
Two output signals, RX_DV/LOS and RX_ER, are generated along with the decoded 16-bit data output on the
RXD[0:15] terminals. The output status signals are asserted as shown in Table 2. When the TLK1501 decodes
normal data and outputs the data on RXD[0:15], RX_DV/LOS is asserted (logic high) and RX_ER is deasserted
(logic low). When the TLK1501 decodes a K23.7 code (F7F7) indicating carrier extend, RX_DV/LOS is
deasserted and RX_ER is asserted. If the decoded data is not a valid 8-bit/10-bit code, an error is reported by
the assertion of both RX_DV/LOS and RX_ER. If the error was due to an error propagation code, the RXD bits
output hex FEFE. If the error was due to an invalid pattern, the data output on RXD is undefined. When the
TLK1501 decodes an IDLE code, both RX_DV/LOS and RX_ER are deasserted and a K28.5 (BC) code followed
by either a D5.6 (C5) or D16.2 (50) code are output on the RXD terminals.
Table 2. Receive Status Signals
RECEIVED 20 BIT DATA
IDLE (< K28.5, D5.6 >, < K28.5, D16.2 >)
Carrier extend (K23.7, K23.7)
Normal data character (DX.Y)
Receive error propagation (K30.7, K30.7)
loss of signal detection
RX_DV/LOS
0
0
1
1
RX_ER
0
1
0
1
The TLK1501 has a loss of signal detection circuit for conditions where the incoming signal no longer has a
sufficient voltage level to keep the clock recovery circuit in lock. The signal detection circuit is intended to be
an indication of gross signal error conditions, such as a detached cable or no signal being transmitted, and not
an indication of signal coding health. The TLK1501 reports this condition by asserting, the RX_DV/LOS, RX_ER
and RXD[0:15] all to a high state. As long as the signal is above 200 mV in differential magnitude, the LOS circuit
does not signal an error condition.
power down mode
When the ENABLE pin is deasserted low, the TLK1501 will go into a power down mode. In the power down
mode, the serial transmit pins (DOUTTXP, DOUTTXN), the receive data bus pins (RXD[0:15]), and RX_ER will
go into a high-impedance state. In the power-down mode the RX_DV/LOS pin acts as an output of the signal
detection circuit which remains active. If the signal detection circuit detects a valid differential signal amplitude
of >200 mV on each of the serial receive pins (DINRXP, DINRXN), RX_DV/LOS is driven high. If no signal of
sufficient amplitude is detected, the signal detection circuit will indicate a loss of signal by driving RX_DV/LOS
low. In the power-down condition, the signal detection circuit draws less than 5 mW.
synchronization and initialization
The TLK1501 has a synchronization-state machine which is responsible for handling link initialization and
synchronization. Upon power up or reset, the state machine enters the acquisition (ACQ) state and searches
for IDLE. Upon receiving three consecutive IDLEs or carrier extends, the state machine enters the
synchronization (SYNC) state. If, during the acquisition process, the state machine receives valid data or an
error propagation code, it immediately transitions to the SYNC state. The SYNC state is the state for normal
device transmission and reception. The initialization and synchronization state diagram is provided in
Figure 6.
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