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TLK1501_12 Datasheet, PDF (13/32 Pages) Texas Instruments – 0.6 TO 1.5 GBPS TRANSCEIVER | |||
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TLK1501
0.6 TO 1.5 GBPS TRANSCEIVER
SLLS428F â JUNE 2000 â REVISED JANUARY 2004
synchronization and initialization (continued)
The state of the receive data bus, status terminals, and serial inputs during the link acquisition process is
illustrated in Figure 8 and Figure 9.
ACQ
SYNC
DINRxP,
DINRxN
IDLE or Carrier
Extend
IDLE or Carrier
Extend
IDLE or Carrier
Extend
D0âD15
RDx[0â15]
Rx_ER
Rx_DV
XXXXXXXXXXXXXXXXXXX
IDLE or Carrier
Extend
IDLE or Carrier
Extend
D0âD15
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ
RESET
(Internal Signal)
Figure 8. Receive Side Timing Diagram (Idle or Carrier Extend)
ACQ
SYNC
DINRxP,
DINRxN
IDLE
Valid Data or
Error Prop
D0âD15
D0âD15
RDx[0â15]
Rx_ER
Rx_DV
XXXXXXXXXXXXXXXXXXX
Valid Data or
Error Prop
ÃÃÃÃÃÃÃÃÃÃ
D0âD15
D0âD15
RESET
(Internal Signal)
Figure 9. Receive Side Timing Diagram (Valid Data or Error Propagation)
redundant port operation
The TLK1501 allows users to design a redundant port by connecting receive data bus terminals from two
TLK1501 devices together. Asserting the LCKREFN to a low state causes the receive data bus terminals, the
RXD[0:15], RX_CLK and RX_ER, and RX_DV/LOS to go to a high-impedance state.
PRBS verification
The TLK1501 also has a built-in BERT function in the receiver side that is enabled by the PRBSEN. It can check
for errors and report the errors by forcing the RX_ER/PRBSPASS terminal low.
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