TLC59711 Datasheet, PDF (8/36 Pages) Texas Instruments – 12-Channel, 16-Bit, Enhanced Spectrum PWM, RGB, LED Driver

TLC59711
SBVS181 – OCTOBER 2011
PIN CONFIGURATIONS
PWP PACKAGE
HTSSOP-20 PowerPAD
(TOP VIEW)
IREF 1
GND 2
OUTR0 3
OUTG0 4
OUTB0 5
OUTR1 6
OUTG1 7
OUTB1 8
SDTI 9
SCKI 10
PowerPAD
(Bottom Side)
20 VREG
19 VCC
18 OUTB3
17 OUTG3
16 OUTR3
15 OUTB2
14 OUTG2
13 OUTR2
12 SDTO
11 SCKO
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TERMINAL
NAME
PWP
IREF
1
GND
2
OUTB0
5
OUTB1
8
OUTB2
15
OUTB3
18
OUTG0
4
OUTG1
7
OUTG2
14
OUTG3
17
OUTR0
3
OUTR1
6
OUTR2
13
OUTR3
16
SCKI
10
SCKO
11
SDTI
9
SDTO
12
VREG
20
VCC
19
TERMINAL FUNCTIONS
I/O
DESCRIPTION
Maximum current programming terminal.
I/O
A resistor connected between IREF and GND sets the maximum current for every constant-current
output. When this terminal is directly connected to GND, all outputs are forced off. The external resistor
should be placed close to the device.
— Power ground terminal
O
O ^{BLUE constant-current outputs.}
Multiple outputs can be configured in parallel to increase the constant-current capability.
O _{Different voltages can be applied to each output.}
O
O
O ^{GREEN constant-current outputs.}
Multiple outputs can be configured in parallel to increase the constant-current capability.
O _{Different voltages can be applied to each output.}
O
O
O ^{RED constant-current outputs.}
Multiple outputs can be configured in parallel to increase the constant-current capability.
O _{Different voltages can be applied to each output.}
O
Serial data shift clock input.
I
Data present on SDTI are shifted to the LSB of the 224-bit shift register with the SCKI rising edge Data in
the shift register are shifted toward the MSB at each SCKI rising edge.
The MSB data of the shift register appear on SDTO.
Serial data shift clock output.
O The input shift clock signal from SCKI is adjusted to the timing of the serial data output for SDTO and the
signal is then output at SCKO.
I Serial data input for the 224-bit shift register
Serial data output of the 224-bit shift register.
O SDTO is connected to the MSB of the 224-bit shift register. Data are clocked out at the falling edge
SCKO.
Internal linear voltage regulator output.
A decoupling capacitor of 1 µF must be connected. This output can be used for external devices as a
I/O 3.3-V power supply. This terminal can be connected with the VREG terminal of other devices to increase
the supply current. Also, this pin can be supplied with 3 V to 5.5 V from an external power supply by
connecting it to VCC.
— Power-supply terminal
8
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