TLC59711 Datasheet, PDF (22/36 Pages) Texas Instruments – 12-Channel, 16-Bit, Enhanced Spectrum PWM, RGB, LED Driver

TLC59711
SBVS181 – OCTOBER 2011
www.ti.com
INTERNAL LATCH PULSE GENERATION TIMING
The internal latch pulse is generated when the SCKI rising edge does not change for 8x the period between the
last SCKI rising edge and the second to last SCKI rising edge if the data of the six MSBs in the 244-bit shift
register are the command code 25h. The generation timing changes as a result of the SCKI frequency with the
time range between 16384 times the internal oscillator period (2.74ms), maximum, and 8x the internal oscillator
period (666 ns), minimum. Figure 25 shows the internal latch pulse generation timing.
The internal latch pulse is generated when the SCKI rising edge is not input during 8 times of
Period A if the 6-bit data of the MSB-side in the 244-bit shift register is the command code 25h.
SCKI
Latch Pulse
(Internal)
224-Bit Shift
Register Data
(Internal)
1
2
3
4¼
N-3 N-2 N-1 N
Period A
Write command 25h + 218-bit data.
The next SCKI clock should start after 8 or more
clock periods (1.34 ms, min) of the internal clock
from the internal latch pulse generation timing.
218-Bit
Data Latch
(Internal)
218-bit data are copied from shift register
when the internal latch is generated.
Figure 25. Data Latch Pulse Generation Timing
AUTO DISPLAY REPEAT FUNCTION
This function repeats the total display period without a BLANK bit change, as long as the GS reference clock is
available. This function can be enabled or disabled with DSPRPT (bit 214) in the data latch. When the DSPRPT
bit is '1', this function is enabled and the entire display period repeats without a BLANK bit data change. When
the DSPRPT bit is '0', this function is disabled and the entire display period executes only once after the BLANK
bit is set to '0' or the internal latch pulse is generated when the display timing reset function is enabled. Figure 26
shows the auto display repeat operation timing.
BLANK Bit
in Data Latch
(Internal)
GS Reference Clock
(SCKI or Internal Oscillator)
DSPRPT Bit
in Data Latch
(Internal)
1
4
2
5
3
DSPRPT = 1
(Auto Repeat On)
65534 1
4
65535 2
5
65533 65536 3
65534 1
4
7
10
65535 2
5
8
65533 65536 3
6
9
The maximum GS clocks
is 4096 in 12-bit PWM mode.
1st Display Period
2nd Display Period
3rd Display Period
OFF
OUTXn
(GSDATA = FFFFh)
ON
Display period is repeated
by auto refresh function.
OUTn is forced off
when BLANK is ‘1’.
1
2
65534 1
65535 2
65536
DSPRPT = 0
(Auto Repeat Off)
1st
Display Period
OUTn is not turned
on until the next
BLANK changes
to ‘0’.
Figure 26. Auto Repeat Display Function
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