DS99R103_14 Datasheet, PDF (8/30 Pages) Texas Instruments – 3-40MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer

DS99R103, DS99R104
SNLS241D – MARCH 2007 – REVISED APRIL 2013
www.ti.com
Parasitic package and
Trace capcitance
DEN VCC/2
(single-ended)
0V
DOUT±
(differential)
200 mV
DEN VCC/2
(single-ended)
0V
200 mV
DOUT±
(differential)
DEN
DOUT+
DOUT-
5 pF
100:
CLK1
t_LZD
V_CC/2
CLK1
t_TCP
t_TCP
t_ZLD
t_ZHD
DCA
DCA _{DCA DCA}
$OO GDWD ³0´V
DCA DCA DCA DCA
t_HZD
V_CC/2
DCA ^{DCA DCA DCA}
$OO GDWD ³1´V
DCA DCA DCA DCA
CLK0
t_TCP
t_TCP
CLK0
Figure 6. Serializer TRI-STATE Test Circuit and Delay
0V
200 mV
0V
200 mV
PWDWN
2.0V
TCLK
DOUT±
t_PLD
TRI-STATE
t_ZHD or
t_ZLD
Output
Active
0.8V
t_HZD or
t_LZD
TRI-STATE
Figure 7. Serializer PLL Lock Time, and TPWDNB TRI-STATE Delays
8
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