DS92LX2121_14 Datasheet, PDF (8/43 Pages) Texas Instruments – 10 - 50 MHz DC-Balanced Channel Link III Bi-Directional Control Serializer and Deserializer

DS92LX2121, DS92LX2122
SNLS330J – MAY 2010 – REVISED JANUARY 2014
www.ti.com
Serializer Electrical Characteristics^(1)(2)(3) (continued)
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max Units
I_OS
Output Short Circuit Current
V_OUT = 0V ⁽⁴⁾
Serializer
GPO Outputs
Deserializer
LVCMOS
Outputs
-11
mA
-20
I_OZ
TRI-STATE Output Current
Register
RPWDNB = 0V, Address
V_OUT = 0V or V_DD (OSS_SEL =
-20
0)
±1
+20
µA
CML DRIVER DC SPECIFICATIONS (DOUT+, DOUT-)
|V_OD|
Output Differential Voltage
R_T = 100Ω
(SeeFigure 9)
268
340
412
mV
ΔV_OD
V_OS
ΔV_OS
I_OS
Output Differential Voltage Unbalance R_L = 100Ω
Output Differential Offset Voltage
R_L = 100Ω (See
Figure 9)
Offset Voltage Unbalance
RL = 100Ω
Output Short Circuit Current
DOUT+/- = 0V,
PDB = L or H ⁽⁴⁾
1
50
mV
V_{DD (MIN)} - V_OD V_DD - V_OD V_{DD (MAX)} -
(MAX)
V_{OD (MIN)}
V
1
50
mV
-27
mA
R_T
Differential Internal Termination
Resistance
Differential across
DOUT+ and
DOUT-
80
100
120
Ω
CML RECEIVER DC SPECIFICATIONS (RIN+, RIN-)
V_TH
V_TL
Differential Threshold High Voltage
Differential Threshold Low Voltage
V_CM = 1.2V
V_IN
Differential Input Voltage Range
RIN+ - RIN-
I_IN
Input Current
V_IN = V_DD or 0 V,
V_DD = 1.89 V
R_T
Differential Internal Termination
Resistance
Differential across
RIN+ and RIN-
+90
mV
-90
180
mV
-20
±1
+20
µA
80
100
120
Ω
SER/DES SUPPLY CURRENT *DIGITAL, PLL,
AND ANALOG VDDS
RT = 100Ω
WORST CASE
V_DDn = 1.89
Serializer (Tx)
pattern (See
V
I_DDT
Total Supply Current Mode (includes _{Figure 6)}
f = 50 MHz
load current)
Default
RT = 100Ω
Registers
RANDOM pattern
62
90
mA
55
I_DDIOT
Serializer (Tx)
VDDIO Supply Current (includes load
current)
RT = 100Ω
WORST CASE
pattern (See
Figure 6)
V_DDIO = 1.89
V
PCLK = 50
MHz
Default
Registers
V_DDIO = 3.6 V
PCLK = 50
MHz
Default
Registers
2
5
mA
7
15
I_DDTZ
I_DDIOTZ
Serializer (Tx)
Supply Current Power-down
PDB = 0V; All
other LVCMOS
Inputs = 0V
V_DD = 1.89 V
V_DDIO = 1.89
V
V_DDIO = 3.6 V
370
775
55
125
µA
65
135
(4) Specification is ensured by characterization and is not tested in production.
8
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