DS92LX2121_14 Datasheet, PDF (30/43 Pages) Texas Instruments – 10 - 50 MHz DC-Balanced Channel Link III Bi-Directional Control Serializer and Deserializer

DS92LX2121, DS92LX2122
SNLS330J – MAY 2010 – REVISED JANUARY 2014
EMI REDUCTION
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Des - Receiver Staggered Output
The Receiver staggered outputs allows for outputs to switch in a random distribution of transitions within a
defined window. Outputs transitions are distributed randomly. This minimizes the number of outputs switching
simultaneously and helps to reduce supply noise. In addition it spreads the noise spectrum out reducing overall
EMI.
Des Spread Spectrum Clocking Compatibilty
The DS92LX2122 parallel data and clock outputs have programmable SSCG ranges from 70 kHz and +-2% (4%
total) from 20 MHz to 50 MHz. The modulation rate and modulation frequency variation of output spread is
controlled through the SSC control registers.
PIXEL CLOCK EDGE SELECT (TRFB/RRFB)
The TRFB/RRFB selects which edge of the Pixel Clock is used. For the SER, this register determines the edge
that the data is latched on. If TRFB register is 1, data is latched on the Rising edge of the PCLK. If TRFB register
is 0, data is latched on the Falling edge of the PCLK. For the DES, this register determines the edge that the
data is strobed on. If RRFB register is 1, data is strobed on the Rising edge of the PCLK. If RRFB register is 0,
data is strobed on the Falling edge of the PCLK.
PCLK
DIN/
ROUT
TRFB/RRFB: 0
TRFB/RRFB: 1
Figure 33. Programmable PCLK Strobe Select
Applications Information
AC COUPLING
The SER/DES supports only AC-coupled interconnects through an integrated DC balanced decoding scheme.
External AC coupling capacitors must be placed in series in the Channel Link III signal path as illustrated in
Figure 34.
D_OUT+
D
D_OUT-
R_IN+
R
R_IN-
Figure 34. AC-Coupled Application
For high-speed Channel Link III transmissions, the smallest available package should be used for the AC
coupling capacitor. This will help minimize degradation of signal quality due to package parasitics. The I/O’s
require a 0.1 μF AC coupling capacitors to the line.
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