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DS92LX2121_14 Datasheet, PDF (34/43 Pages) Texas Instruments – 10 - 50 MHz DC-Balanced Channel Link III Bi-Directional Control Serializer and Deserializer | |||
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DS92LX2121, DS92LX2122
SNLS330J â MAY 2010 â REVISED JANUARY 2014
www.ti.com
INTERCONNECT GUIDELINES
For full details, see the Channel-Link PCB and Interconnect Design-In Guidelines (literature number SNLA008)
and the Transmission Line RAPIDESIGNER Operation and Applications Guide (literature number SNLA035).
⢠Use 100⦠coupled differential pairs
⢠Use the S/2S/3S rule in spacings
â S = space between the pair
â 2S = space between pairs
â 3S = space to LVCMOS signal
⢠Minimize the number of Vias
⢠Use differential connectors when operating above 500Mbps line speed
⢠Maintain balance of the traces
⢠Minimize skew within the pair
Additional general guidance can be found in the LVDS Ownerâs Manual (literature number SNLA187), which is
available in PDF format from the TI LVDS & CML Solutions web site.
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Product Folder Links: DS92LX2121 DS92LX2122
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