THS4551 Datasheet, PDF (7/70 Pages) Texas Instruments – Low-Noise, Precision, 150-MHz, Fully Differential Amplifier

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THS4551
SBOS778A – APRIL 2016 – REVISED AUGUST 2016
Electrical Characteristics: (V_S+) – (V_S–) = 5 V (continued)
at T_A ≈ 25°C, VOCM pin = open, R_F = 1 kΩ, R_L = 1 kΩ, V_OUT = 2 V_PP, 50-Ω input match, G = 1 V/V, PD = V_S+, single-ended
input, differential output, and input and output referenced to default midsupply for ac-coupled tests (unless otherwise noted);
see Figure 61 for a gain of 1-V/V test circuit
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
TEST
LEVEL ⁽¹⁾
POWER SUPPLY
Specified operating voltage
I_Q
Quiescent operating current
dI_Q/dT
Quiescent current temperature
coefficient
T_A ≈ 25°C⁽⁵⁾, V_S+ = 5 V
T_A = –40°C to +125°C, V_S+ = 5 V
V_S+ = 5 V
2.7
5
5.4 V
B
1.28
1.35
1.44
A
mA
0.97
1.92
B
2.4
3.9
5.4 µA/°C
B
±PSRR Power-supply rejection ratio
POWER-DOWN
Either supply pin to differential V_OUT
93
110
dB
A
Enable voltage threshold
Disable voltage threshold
Disable pin bias current
Power-down quiescent current
Specified on above 1.7 V
Specified off below 0.7 V
PD = V_S– → V_S+
(V_S–) + 1.15
V
A
(V_S–) + 0.55
V
A
–100
±10
100 nA
B
2
8 µA
A
t_ON
Turn-on time delay
Time from PD = low to V_OUT = 90% of final value
t_OFF
Turn-off time delay
Time from PD = low to V_OUT = 10% of final value
OUTPUT COMMON-MODE VOLTAGE (V_OCM) CONTROL⁽⁶⁾ (See Figure 65)
SSBW Small-signal bandwidth
V_OCM = 100 mV_PP at the control pin
LSBW Large-signal bandwidth
SR
Slew rate⁽²⁾
V_OCM = 1 V_PP at the control pin
From 1-V_PP LSBW
Output common-mode noise
(≥ 2 kHz)
VOCM pin driven from low impedance
700
ns
C
100
ns
C
40
MHz
C
8
MHz
C
18
V/µs
C
15
nV/√Hz
C
Gain
VOCM control pin input to output average voltage
(see Figure 65)
0.997
0.999
1.001 V/V
A
Input bias current
–100
±10
100 nA
A
DC output balance (differential
mode to common-mode output)
V_OUT = ±1 V
85
dB
C
Output balance
SSBW
LSBW
V_OUT = 100 mV_PP (output balance drops –3 dB from
the 85-dB dc level)
V_OUT = 2 V_PP (output balance drops –3 dB from the
85-dB dc level)
300
C
kHz
300
C
Input impedance
(VOCM pin input)
47 || 1.3
kΩ || pF
C
Default voltage offset from
[(V_S+) – (V_S–)] / 2
CM
V_OS
Common-mode offset voltage
Common-mode offset voltage
drift ⁽⁴⁾
VOCM pin open
VOCM pin driven to
[(V_S+) – (V_S–)] / 2
T_A = –40°C to +125°C
T_A = 25°C
T_A = 0°C to +70°C
T_A = –40°C to +85°C
T_A = –40°C to +125°C
–12
–5.0
–5.25
–5.7
–5.7
–10
±2
12 mV
A
±1
5.0
A
5.5
B
mV
5.6
B
6.0
B
±2
10 µV/°C
B
Common-mode loop supply
headroom to negative supply
< ±4-mV shift from
midsupply CM V_OS
Common-mode loop supply
headroom to positive supply
< ±4-mV shift from
midsupply CM V_OS
T_A = 25°C
T_A = 0°C to +70°C
T_A = –40°C to +85°C
T_A = –40°C to +125°C
T_A = 25°C
T_A = 0°C to 70°C
T_A = –40°C to +85°C
T_A = –40°C to +125°C
0.55
A
0.6
B
V
0.65
B
0.7
B
1.5
A
1.6
B
V
1.65
B
1.7
B
(5) T_A = 25°C and I_CC ≈ 1.35 mA. The test limit is expanded for the ATE ambient range of 22°C to 32°C with a 4-µA/°C I_CC temperature
coefficient considered; see Figure 95.
(6) Specifications are from the input VOCM pin to the differential output average voltage.
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