THS4551 Datasheet, PDF (6/70 Pages) Texas Instruments – Low-Noise, Precision, 150-MHz, Fully Differential Amplifier

THS4551
SBOS778A – APRIL 2016 – REVISED AUGUST 2016
www.ti.com
Electrical Characteristics: (V_S+) – (V_S–) = 5 V (continued)
at T_A ≈ 25°C, VOCM pin = open, R_F = 1 kΩ, R_L = 1 kΩ, V_OUT = 2 V_PP, 50-Ω input match, G = 1 V/V, PD = V_S+, single-ended
input, differential output, and input and output referenced to default midsupply for ac-coupled tests (unless otherwise noted);
see Figure 61 for a gain of 1-V/V test circuit
PARAMETER
DC PERFORMANCE⁽³⁾
TEST CONDITIONS
MIN
TYP
MAX UNIT
TEST
LEVEL ⁽¹⁾
A_OL
Open-loop voltage gain
Internal feedback trace resistance RGT only (pins 11-1, and 10-4)
105
125
dB
A
3.1
3.25
3.4 Ω
A
Internal feedback trace resistance
mismatch
RGT only (pins 11-1, and 10-4)
–0.1
0.05
0.1 Ω
A
V_IO
Input-referred offset voltage
Input offset voltage drift⁽⁴⁾
I_IB
Input bias current
(positive current out of node)
Input bias current drift⁽⁴⁾
I_OS
Input offset current
Input offset current drift⁽⁴⁾
INPUT
T_A = 25°C
T_A = 0°C to +70°C
T_A = –40°C to +85°C
T_A = –40°C to +125°C
T_A = –40°C to +125°C (DGK package)
T_A = 25°C
T_A = 0°C to +70°C
T_A = –40°C to +85°C
T_A = –40°C to +125°C
T_A = –40°C to +125°C (DGK package)
T_A = 25°C
T_A = 0°C to +70°C
T_A = –40°C to +85°C
T_A = –40°C to +125°C
T_A = –40°C to +125°C (DGK package)
–175
±50
175
A
–225
–295
265
B
µV
295
B
–295
375
B
–2.0
±0.45
2.0 µV/°C
B
0.55
1.0
1.5
A
0.41
1.75
B
µA
0.2
1.83
B
0.2
2.05
B
2
3.3
5.5 nA/°C
B
–50
±10
50
A
–57
63
B
nA
–68
67
B
–68
78
B
–280
±70
280 pA/°C
B
Common-mode input, low
< 3-dB degradation in
CMRR from midsupply
T_A = 25°C
T_A = –40°C to +125°C
(V_S–) – 0.2 (V_S–) – 0.1
V
A
(V_S–) – 0.1
V_S–
B
Common-mode input, high
< 3-dB degradation in
CMRR from midsupply
T_A = 25°C
(V_S+) – 1.2 (V_S+) – 1.1
T_A = –40°C to +125°C (V_S+) – 1.3 (V_S+) – 1.2
A
V
B
CMRR Common-mode rejection ratio
Input pins at [(V_S+) – (V_S–)] / 2
93
110
dB
A
Input impedance differential mode Input pins at [(V_S+) – (V_S–)] / 2
100 || 1.2
kΩ || pF
C
OUTPUT
Output voltage, low
T_A = 25°C
T_A = –40°C to +125°C
(Vs–) +
0.2
(V_S–) +
0.23
A
V
(V_S–) + 0.2
(V_S–) +
0.22
B
Output voltage, high
T_A = 25°C
T_A = –40°C to +125°C
(V_S+) –
0.23
(V_S+) – 0.2
(V_S+) –
0.22
(V_S+) – 0.2
A
V
B
Continuous output current
Linear output current
T_A = 25°C, ±2.4 V, R_L= 40 Ω,
V_OCM offset < 15 mV
T_A = –40°C to +125°C, ±2 V, R_L= 40 Ω,
V_OCM offset < ±15 mV
T_A = 25°C, ±2.4 V, R_L= 50 Ω, A_OL > 80 dB
T_A = –40°C to +125°C, ±1.8 V, R_L= 50 Ω,
A_OL > 80 dB
±60
±65
±50
±40
±45
±30
A
mA
B
A
mA
B
(3) Currents out of pin are treated as a positive polarity.
(4) Input offset voltage drift, input bias current drift, input offset current drift, and V_OCM drift are average values calculated by taking data at
the at the maximum-range ambient-temperature end points, computing the difference, and dividing by the temperature range. Maximum
drift specifications are set by ±4 × (standard deviations) on device distributions tested over the –40°C to +125°C ambient temperature
range. Drift is not specified by test or QA sample test.
6
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