THS4551 Datasheet, PDF (45/70 Pages) Texas Instruments – Low-Noise, Precision, 150-MHz, Fully Differential Amplifier

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THS4551
SBOS778A – APRIL 2016 – REVISED AUGUST 2016
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1M
Bench, wo Capacitors
Bench, with Capacitors
TINA-TI•, wo Capacitors
TINA-TI•, with Capacitors
10M
Frequency (Hz)
100M
D067
Figure 82. Attenuator Response Shapes With and Without External Capacitors
This approach does a good job of flattening the response for what starts out as a low phase margin attenuator
application. The simulation model does a very good job of predicting the peaking and showing the same
improvement with the external capacitors (both give a flat, approximately 24-MHz, closed-loop bandwidth for the
gain of 0.1-V/V design). The output noise starts to peak up (because of the noise gain shaping of the capacitors)
above 3.5 MHz in this example. These stages normally drive the RC filter at the input of a SAR ADC that filters
off the noise peaking above 3.5 MHz.
10.1.7 The Effect of Adding a Feedback Capacitor
Adding a feedback capacitor to band-limit the signal path is very common in lower frequency designs. This
approach is very effective for the signal path gain but does create the potential for high-frequency peaking and
oscillation for a wideband device such as the THS4551. The feedback capacitor by itself takes the noise gain to
1 V/V at high frequencies. Depending on the frequency where the noise gain goes to 1V/V, and what added
phase margin reduction may already be in place resulting from the load RC, the feedback capacitors can cause
instability.
Figure 83 shows the starting point for a typical band-limited design. At lower frequencies, this example delivers a
gain of 10 V/V with an intentional band limit in the feedback RC at 320 kHz. This single 5-V design targets a
midsupply output common-mode voltage with only a noise reduction capacitor on the V_OCM input control.
High-Gain, Single-Ended
to Differential Output Stage
with Feedback Pole
CF1
250 pF
RF1
2k
THS4551 Wideband,
Fully Differential Amplifier
VS+
VS-
+
5V
0V ⁺
VIN
±
±
RG1
200
VOCM
10 nF
VS+
±
+
FDA
±
+
PD
10
10 nF
SAR ADC
Input
VS- ^VS+
10
RG2
200
RF2
2k
CF2
250 pF
Copyright © 2016, Texas Instruments Incorporated
Figure 83. Single-Ended to Differential Stage with a Feedback Pole
Copyright © 2016, Texas Instruments Incorporated
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