BQ26501_16 Datasheet, PDF (7/33 Pages) Texas Instruments – HANDHELD APPLICATIONS

Not Recommended For New Designs
bq26501
ą
SLUS586B − OCTOBER 2003 − REVISED MARCH 2004
APPLICATION INFORMATION
Digital Magnitude Filter
The digital magnitude filter (DMF) threshold can be set in EEPROM to indicate a threshold below which any
charge or discharge accumulation is ignored. This allows setting a threshold above the maximum VFC offset
expected from the device and PCB combination. This ensures that when no charge or discharge current is
present, the measured capacity change by the bq26501 is zero. Note that even a small PCB offset can add up
to a large error over a long period. In addition to setting the threshold above the largest offset expected, the DMF
should be set below the minimum signal level to be measured. Since the measured signal can only be measured
as accurately as the VFC offset induced from the PCB, the sense resistor value should be large enough to allow
the minimum current level to provide a signal level substantially higher than the maximum offset voltage.
Conversely, the sense resistor must be small enough to meet the system requirement for insertion loss as well
as keep the maximum voltage across the sense resistor below the ±100-mV maximum that the VFC can
accurately measure.
The DMF threshold is programmed in EEPROM in increments of 6 µV. Programming a zero in the DMF value
disables the DMF function and no VFC counts are ignored.
Voltage
The bq26501 monitors the battery voltage through the BAT pin and reports an offset corrected value through
the internal registers. The bq26501 also monitors the voltage for the end-of-discharge voltage (EDV) thresholds.
The EDV threshold levels are used to determine when the battery has reached an empty state.
Temperature
The bq26501 uses an integrated temperature sensor to monitor the pack temperature. The temperature
measurements reported through the internal registers are used to adjust charge and discharge rate
compensations, and self-discharge capacity loss estimation.
RBI Input
The register back-up input pin, RBI, is used with an external capacitor to provide backup potential to the internal
registers when V_CC drops below the power-on-reset voltage V_(POR). V_CC is output on RBI when V_CC is above
V_(POR), charging the capacitor. Figure 2 shows an optional 1-MΩ resistor from RBI pin to VCC. This allows the
device to maintain RAM register data when the battery voltage is below V_(POR) and above 1.3 V. The bq26501
checks for RAM corruption by storing redundant copies of the high bytes of NAC and LMD. After a reset, the
bq26501 compares the redundant NAC and LMD values and verifies the accuracy of 2 checkbyte values. If the
redundant copies match and the checkbytes are correct, NAC and LMD are retained and the CI bit in FLAGS
is left unchanged. If these checks are not correct, NAC is cleared, LMD is initialized from EEPROM, and the
CI bit in FLAGS is set to “1”. All other RAM is initialized on all resets.
Layout Considerations
The auto-compensating VFC approach effectively cancels the internal offset voltage within the bq26501, but
any external offset caused by PCB layout is not cancelled. This makes it critical to pay special attention to the
PCB layout. To obtain optimal performance, the decoupling capacitor from V_CC to V_SS and the filter capacitors
from SRP and SRN to V_SS should be placed as closely as possible to the bq26501, with short trace runs to both
signal and VSS pins. All low-current V_SS connections should be kept separate from the high-current discharge
path from the battery and should tie into the high current trace at a point directly next to the sense resistor. This
should be a trace connection to the edge or inside of the sense resistor connection, so that no part of the V_SS
interconnections carry any load current and no portion of the high-current PCB trace is included in the effective
sense resistor (i.e. Kelvin connection).
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