BQ26501_16 Datasheet, PDF (3/33 Pages) Texas Instruments – HANDHELD APPLICATIONS

Not Recommended For New Designs
bq26501
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SLUS586B − OCTOBER 2003 − REVISED MARCH 2004
ELECTRICAL CHARACTERISTICS(continued)
TJ = −20°C to 70°C, TJ = TA, 2.6 V ≤ VCC ≤ 4.5 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP
CAPACITY MEASUREMENT
Voltage-to-frequency converter offset
Voltage-to-frequency converter gain
3
Voltage-to-frequency converter gain
variabilty(3)
0°C ≤ TA ≤ 50°C
Voltage-to-frequency input
(VSRP − VSRN)
EEPROM PROGRAMMING (VCC ≥ 3.0 V, 20°C ≤ TA ≤ 35°C)(1)
tRISE
Programming voltage rise time
tPROG Programming voltage high time
VPROG = 21 V
tFALL
Programming voltage fall time
VPROG Programming voltage
Applied to GPIO pin
IPROG EEPROM programming current
Current into GPIO pin
IO PORT (GPIO) AND SERIAL INTERFACE (HDQ)
−100
1
20
1
20
VIH
High-level input voltage
1.9
VIL
Low-level input voltage
VOL
GPIO low-level output voltage
IOL = 0.3 mA
VOL
HDQ low-level output voltage
IOL = 2 mA
IHDQPD HDQ internal pull-down current
STANDARD SERIAL COMMUNICATION (HDQ) TIMING⁽²⁾
t(B)
Break timing
190
t(BR)
Break recovery time
40
t(CYCH) Host bit window timing
190
t(HW1) Host sends 1 time
0.5
t(HW0) Host sends 0 time
86
t(RSPS) bq26501 to host response time
190
t(CYCD) bq26501 bit window timing
190
t(DW1) bq26501 sends 1 time
32
t(DW0) bq26501 sends 0 time
80
(1) _{Maximum number of programming cycles on the EEPROM is 10 and data retention time is 10 years at TA=85°C}
(2) _{See Figure 1.}
(3) _{Not a production tested parameter.}
MAX UNIT
15 µV
µVH
2%
100 mV
100 ms
22 V
3 mA
0.7
V
0.4
0.4
4.5 µA
50
145 µs
320
260
50
145
The following timing diagrams describe break and break recovery timing (a), host transmitted bit timing (b),
bq26501 transmitted bit timing (c), and bq26501 to host response timing (d).
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