BQ26501_16 Datasheet, PDF (14/33 Pages) Texas Instruments – HANDHELD APPLICATIONS

bq26501
Not Recommended For New Designs
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SLUS586B − OCTOBER 2003 − REVISED MARCH 2004
APPLICATION INFORMATION
Relative State of Charge (RSOC) – Address 0x0B
RSOC reports the battery charge as a percentage of the last measured discharge value (LMD). This value
should be used if the end equipment reports percentage rather than time-to-empty. The equation is:
RSOC(%) + 100
NAC
LMD
(3)
The host system has read-only access to this register.
Nominal Available Capacity Registers (NACL/NACH) – Address 0x0C/0x0D
Uncompensated available capacity in the battery. NAC is reported in counts of 3 µVh. This register pair
increments during charge (V_SRP > V_SRN) and decrements during discharge (V_SRP < V_SRN). The NAC registers
are cleared when the BAT voltage is less than or equal to EDVF while discharging. The NAC registers are
cleared during reset or power-on-reset (POR), if RAM corruption is detected. The register value is retained after
a reset if RAM corruption is not detected. The host system has read only access to this register pair.
Discharge Rate Compensated Available Capacity Registers (CACDL/CACDH) – Address 0x0E/0x0F
Available capacity in the battery, compensated for discharge rate. CACD is reported in counts of 3 µVh. This
register pair follows NAC during charge and discharge by an amount computed from the measured discharge
rate and the discharge rate compensation value programmed into EEPROM. CACD is not allowed to increase
while discharging, so that if the discharge rate decreases, the available capacity does not increase. CACD
equals NAC if the CHGS bit is “1”. If CHGS is “0”, CACD is the smaller of the previous and new computed
values. The host system has read-only access to this register pair.
Temperature Compensated CACD Registers (CACTL/CACTH) – Address 0x10/0x11
Available capacity in the battery, compensated for discharge rate and temperature. CACT is reported in counts
of 3 µVh. This register pair follows CACD during both charge and discharge unless the temperature is less than
the threshold programmed into EEPROM. Once the temperature falls below the programmed threshold, the
CACT value is reduced from CACD by an amount computed from ILMD and the temperature compensation
constants programmed into EEPROM. The host system has read only access to this register pair.
Last Measured Discharge Registers (LMDL/LMDH) – Address 0x12/0x13
Last measured discharge, used as a measured full reference, is based on the measured discharge capacity
of the battery from full to empty. LMD is reported in counts of 3 µVh.The firmware updates LMD on a valid
capacity learning cycle, which is defined as the battery reaching the EDV1 level while the VDQ bit is set. Used
with NAC register values to calculate relative state of charge (RSOC). The host system has read only access
to this register pair.
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